P5020NSN1QMB557 vs P5010NSN1QMB 比較
詳細な並列比較: P5020NSN1QMB557 メーカー: NXP Semiconductors および P5010NSN1QMB メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
NXP Semiconductors
P5020NSN1QMB557 - QorIQ Dual-Core 1.6GHz SoC | NXP | Networking
P5020NSN1QMB557 ✓ 生産中NXP Semiconductors
P5010NSN1QMB - QorIQ P5010 SoC, 64-bit Power Arch, 2.0GHz, 1295-FCBGA | NXP
P5010NSN1QMB ✓ 生産中仕様比較
| パラメータ | P5020NSN1QMB557 | P5010NSN1QMB |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $995.00 | $318.25 |
| Part Number | P5020NSN1QMB557 | — |
| Manufacturer | NXP Semiconductors | — |
| Series | QorIQ P5 | — |
| Core Architecture | Power Architecture e5500 (64-bit) | — |
| Number of Cores | 2 | — |
| Core Frequency | 1.6 GHz (max per part decoder NSN1) | — |
| 動作温度範囲 | 0 C to 105 C (extended grade) | — |
| Encryption | No encryption (NoEnc per decoder M) | Hardware-accelerated |
| DDR Memory Controller | DDR3 with ECC, 64-bit | — |
| PCIe Interface | PCIe Gen2 (per QorIQ P5020 datasheet family) | — |
| Ethernet | Gigabit Ethernet (GbE) interfaces | Dual Gigabit Ethernet |
| Serial I/O | Serial RapidIO (SRIO) | — |
| Hardware Acceleration | Pattern-match / trusted-execution engine | DPAA (Data Path Acceleration Architecture) engine |
| パッケージ | 1295-ball FCPBGA 37.5x37.5 mm | 1295-FCBGA (37.5 x 37.5 mm) |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Architecture | — | Power Architecture e5500 (64-bit) |
| Core Count | — | 1 core |
| Maximum Core Frequency | — | 2.0 GHz |
| Cache (L1 Instruction per core) | — | 32 KB |
| Cache (L1 Data per core) | — | 32 KB |
| Cache (L2 shared frontside) | — | 1 MB |
| Memory Controller | — | DDR3 with ECC support |
| PCIe | — | PCI Express Gen 2 controllers integrated |
| High-Speed Interconnect | — | Serial RapidIO (SRIO) |
| Security Engine | — | SEC crypto engine integrated |
| 動作温度 | — | 0C to +105C |