RTAX1000SL-1CGS624B vs RTAX1000SL-1CGS624V Comparaison
Comparaison détaillée côte à côte de RTAX1000SL-1CGS624B par Microchip Technology et RTAX1000SL-1CGS624V par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX1000SL-1CGS624B - Rad-Tolerant FPGA 1M Gates | Microchip
RTAX1000SL-1CGS624B ✓ ActifMicrochip Technology
RTAX1000SL-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1CGS624V ✓ ActifComparaison des spécifications
| Paramètre | RTAX1000SL-1CGS624B | RTAX1000SL-1CGS624V |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 200,00 | $1,00 |
| Logic Density | 1,000,000 equivalent system gates | — |
| ASIC Gates | 125,000 additional ASIC gates | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | — |
| Series | RTAX1000SL | — |
| Speed Grade | -1 | -1 (standard) |
| Technology | Digital CMOS | — |
| Programming Technology | Anti-fuse (one-time programmable, live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Boîtier | 624-ball Ceramic CGA (CGS624) | — |
| Type de montage | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space flight qualified) | Radiation-tolerant (space-flight qualified family) |
| Qualification | DLA SMD 5962-0422006QUA per MIL-PRF-38535 | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Tension d'alimentation | [DATA_NEEDED: core/IO supply voltage] | [DATA_NEEDED: core/IO supply voltage] |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Architecture Base | Derived from Microsemi commercial Axcelerator family | — |
| System Gates | — | 1,000,000 (1.00E6) |
| Logic Cells / Logic Blocks | — | 12096 |
| Logic Family | — | Digital CMOS |
| Programmable Technology | — | Antifuse (one-time programmable) |
| Package Type | — | CGA-624 (ceramic column grid array) |
| Nombre de broches | — | 624 |
| SEU Immunity | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Configuration | — | Live at power-up, single chip, no external boot PROM |
| Clocking | — | Segmentable clock resources |
| Routing Features | — | Chip-wide highway routing, carry logic |