RTAX2000SL-1CGS624E vs RTAX2000S-1CG624PROTO Comparaison
Comparaison détaillée côte à côte de RTAX2000SL-1CGS624E par Microchip Technology et RTAX2000S-1CG624PROTO par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000SL-1CGS624E - 2M-Gate Rad-Tolerant FPGA CGA624 | Microchip
RTAX2000SL-1CGS624E ✓ ActifMicrochip Technology
RTAX2000S-1CG624PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CG624PROTO ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000SL-1CGS624E | RTAX2000S-1CG624PROTO |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10 750,00 | $0,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 2000000 | 2000000 |
| Additional ASIC Gates | 250000 | — |
| Configurable Logic Blocks (CLBs) | 21504 | 21504 |
| Technology | CMOS, 0.15 um | CMOS antifuse (one-time programmable) |
| Core Supply Voltage | 1.5 V | — |
| Maximum Combinatorial Performance | 649 MHz | — |
| Speed Grade | -1 | -1 |
| Boîtier | CBGA624 / CGA-624 Ceramic Column Grid Array | CCGA-624 (CG624 ceramic column grid array) |
| Package Material | Ceramic | — |
| Programming Technology | Anti-fuse, one-time programmable, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits (family max, with optional EDAC) |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | — |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Number of I/Os | [DATA_NEEDED: number of user I/Os] | — |
| Logic Cells | — | 32256 |
| User I/Os (family max) | — | 684 |
| Total Ionizing Dose (functional) | — | 300 krad (Si) |
| Total Ionizing Dose (parametric) | — | 200 krad (Si) |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Maximum System Frequency | — | 350 MHz (family performance) |
| Configuration | — | Live at power-up (nonvolatile antifuse) |
| Qualification Flow | — | PROTO (engineering prototype) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |