XC3090L-8PCG84C vs XC3090L-125PC84C Comparaison
Comparaison détaillée côte à côte de XC3090L-8PCG84C par Xilinx et XC3090L-125PC84C par Xilinx. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC3090L-8PCG84C | XC3090L-125PC84C |
|---|---|---|
| Marque | Xilinx | Xilinx |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,10 | $64,00 |
| Family | XC3000A/L Series FPGA | — |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | — |
| Gate Count | 6,400 gates (typical) | — |
| Configuration Program Store | 64,160 bits | — |
| User I/O Pins | 70 (maximum) | — |
| Boîtier | 84-pin PLCC (J-Lead, PCG84) | 84-pin PLCC (J-lead, package code QCCJ) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | 3.0 V to 3.6 V (typical 3.3 V) |
| Speed Grade | -8 (moderate) | — |
| Température de fonctionnement | 0 C to +70 C (commercial 'C' suffix) | Commercial (0C to +70C) - exact grade [DATA_NEEDED: temperature grade] |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | — |
| Process Technology | [DATA_NEEDED: process node] | CMOS, SRAM-based |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | — |
| Type de montage | Surface Mount (PLCC J-Lead) | Surface Mount |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | unknown | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Technology | SRAM-based, in-system reconfigurable | — |
| Manufacturer | — | Xilinx |
| Series | — | XC3000L |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Logic Family | — | XC3000L Low-Voltage Logic Cell Array |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Equivalent Gates | — | ~5,000 |
| Flip-Flops | — | 928 |
| Maximum Toggle Frequency | — | 125 MHz |
| Terminal Form | — | J-BEND (J-lead) |
| Configuration Interface | — | Serial/parallel mode, JTAG (IEEE 1149.1) |