XC3090LTM-125PC84C vs XC3090L-8PC84BKJ Comparaison
Comparaison détaillée côte à côte de XC3090LTM-125PC84C par Xilinx et XC3090L-8PC84BKJ par Xilinx. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Xilinx
XC3090LTM-125PC84C - 5000 Gates XC3000L FPGA, 125MHz, PLCC-84 | Xilinx
XC3090LTM-125PC84C ObsoleteComparaison des spécifications
| Paramètre | XC3090LTM-125PC84C | XC3090L-8PC84BKJ |
|---|---|---|
| Marque | Xilinx | Xilinx |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $20,85 | $19,20 |
| Device Family | XC3000L | — |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Equivalent Gates | ~5000 gates | — |
| Configurable Logic Blocks (CLBs) | 320 | — |
| Flip-Flops | 928 | — |
| User I/Os | 138 | — |
| Fréquence d'horloge maximale | 125 MHz | — |
| Core Supply Voltage | 3.0 V to 3.6 V | — |
| I/O Supply Voltage | 4.75 V to 5.25 V | — |
| Boîtier | PLCC-84 (PC84) | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) |
| Type de montage | Surface Mount / Through-Hole Socket | Through-hole (PLCC socket) |
| Process Technology | CMOS, SRAM-based configuration | 5 ns CMOS SRAM |
| Température de fonctionnement | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (commercial, C suffix) |
| Configuration Method | Serial or parallel bitstream from external PROM | Serial/parallel SRAM, in-system reconfigurable |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | unknown - legacy windowed ceramic package |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Family | — | XC3000L Low-Voltage Logic Cell Array |
| Logic Cells | — | 320 |
| Usable Gates | — | 6,000 |
| Configuration Memory | — | 64,160 bits |
| Maximum User I/O | — | 144 |
| Supply Voltage (Vcc) | — | 3.0 V to 3.6 V (low-voltage) |
| Speed Grade | — | -8 (approx. 70 MHz toggle) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| Configuration Pins | — | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT |