DSPIC33FJ128MC706-I/PT - 16-bit DSC, 128KB Flash, 64-Pin TQFP
Référence : DSPIC33FJ128MC706-I/PT ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $8.42 | $8,42 |
| 10 | $7.56 | $75,60 |
| 100 | $6.74 | $674,00 |
| 500 | $6.05 | $3 025,00 |
| 1 000 | $5.42 | $5 420,00 |
DSPIC33FJ128MC706-I/PT Présentation
A Digital Signal Controller is a hybrid device that pairs a microcontroller's deterministic control peripherals with a digital signal processor's MAC engine. Within the taxonomy, the dsPIC33F sits above the PIC24 MCU family (shared core and instruction set) and below higher-end dsPIC33E/PIC32 solutions, and is widely deployed in motor control, digital power conversion, and sensor-fusion loops where deterministic timing plus DSP throughput matter. The 'FJ' prefix denotes a flash-based general-purpose variant with motor-control features; the 'MC' subset specifically targets three-phase and BLDC motor drive use cases.
Key features include a 16-bit wide data path, 40 MIPS sustained performance, hardware multiply-accumulate (MAC), six 16-bit timers, dual analog comparators, and a 16-channel 10-bit A/D converter with 1.1 Msps conversion rate. Peripherals include six PWM channels (three pairs) with duty-cycle resolution down to 8.32 ns, a quadrature encoder interface (QEI), I2C, SPI, and dual UART modules. Boundary scan (JTAG) support and a barrel shifter simplify embedded firmware development and industrial comms routing.
Architecturally, the device uses a modified Harvard layout with separate program and data paths, enabling simultaneous fetch and read/write on X and Y data spaces. The integrated DSP engine delivers a 40 MHz / 40 MIPS throughput with single-cycle MAC and barrel-shift operations, suitable for real-time field-oriented control (FOC) math at PWM rates up to 20 kHz.
Typical applications include BLDC and PMSM motor control, three-phase AC induction drives, sensorless motor commutation, switched-mode power supply (SMPS) digital control loops, and industrial sensor interface nodes. The wide -40C to +85C range also qualifies it for factory-floor and outdoor enclosures.
When designing with the DSPIC33FJ128MC706-I/PT, allocate PCB area for the TQFP-64 footprint with thermal pads, and provide proper decoupling (100 nF plus bulk) on each VDD/VSS pair. Use ICSP via PGECx/PGEDx pairs for in-circuit programming and debugging, and remember that all VSS pins must be connected even if a given pin appears unused, or programming may fail.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, giving engineers a single reference for sourcing and design-in decisions.
Alternatives de remplacement direct pour DSPIC33FJ128MC706-I/PT — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec DSPIC33FJ128MC706-I/PT (même facteur de forme et même empreinte) — différant par Core Architecture, Package, Timers, ADC, Operating Temperature.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
DSPIC33FJ128MC706A-I/PT
✅ Remplacement direct✓ En stock
$5.2 / unité
Voir la fiche technique →DSPIC33FJ128MC706AT-I/PT
✅ Remplacement direct✓ En stock
$8.15 / unité
Voir la fiche technique →DSPIC33FJ128MC706A-I/MR
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$6.54 / unité
Voir la fiche technique →DSPIC33FJ128MC506A-I/PT
✅ Remplacement direct✓ En stock
$3.2 / unité
Voir la fiche technique →DSPIC33FJ128MC506AT-I/PT
✅ Remplacement direct✓ En stock
$5.1 / unité
Voir la fiche technique →DSPIC33FJ128MC506A-H/PT
✅ Remplacement direct✓ En stock
$3.9 / unité
Voir la fiche technique →DSPIC33FJ128MC706-I/PT Valeurs maximales et caractéristiques électriques
| Core Architecture | 16-bit dsPIC33F modified Harvard |
| Program Memory (Flash) | 128 KB |
| Data RAM | 16 KB |
| Maximum CPU Speed | 40 MIPS (50 MHz oscillator, 2:1 PLL scale internal) |
| Operating Voltage | 3.0 V to 3.6 V |
| Température de fonctionnement | -40C to +85C (industrial grade) |
| Boîtier | 64-pin TQFP (10x10 mm, 0.5 mm pitch) |
| Type de montage | Surface Mount |
| ADC | 16-channel, 10-bit, up to 1.1 Msps |
| PWM Channels | 6 channels (3 complementary pairs) |
| Timers | Five 16-bit timers + one 32-bit timer |
| Communication Interfaces | 2x UART, 1x SPI, 1x I2C |
| Quadrature Encoder Interface (QEI) | Yes |
| DMA | 8-channel DMA |
| JTAG / Boundary Scan | Yes |
| ICSP Programming | PGECx/PGEDx pairs (multiple pairs supported) |
| Statut RoHS | Compliant |
| Lead-Free | Yes (Pb-free terminal finish) |
Configuration des broches de DSPIC33FJ128MC706-I/PT
| Broche 1 | RP15/PWM3H/PMD3/RE15 — I/O port / PWM output / enhanced PWM |
| Broche 2 | RP14/PWM2H/PMD2/RE14 — I/O port / PWM output / enhanced PWM |
| Broche 3 | RP13/PWM1H/PMD1/RE13 — I/O port / PWM output / enhanced PWM |
| Broche 4 | RP12/PWM1L/PMD0/RE12 — I/O port / PWM output / enhanced PWM |
| Broche 5 | RP11/PWM2L/PMD5/RE11 — I/O port / PWM output / enhanced PWM |
| Broche 6 | RP10/PWM3L/PMD4/RE10 — I/O port / PWM output / enhanced PWM |
| Broche 7 | VDD — Digital supply voltage (3.0 V to 3.6 V) |
| Broche 8 | VSS — Digital ground reference |
| Broche 9 | OSC1/CLKI/RA3 — Crystal oscillator input / external clock / GPIO |
| Broche 10 | OSC2/CLKO/RA2 — Crystal oscillator output / GPIO |
| Broche 11 | RP0/CN0/RB0 — Remappable peripheral / I/O port |
| Broche 12 | RP1/CN1/RB1 — Remappable peripheral / I/O port |
| Broche 13 | RP2/CN2/RB2 — Remappable peripheral / I/O port |
| Broche 14 | RP3/CN3/RB3 — Remappable peripheral / I/O port |
| Broche 15 | RP4/CN4/RB4 — Remappable peripheral / I/O port |
| Broche 16 | RP5/CN5/RB5 — Remappable peripheral / I/O port |
| Broche 17 | RP6/CN6/RB6 — Remappable peripheral / I/O port |
| Broche 18 | RP7/CN7/RB7 — Remappable peripheral / I/O port |
| Broche 19 | AVDD — Analog supply voltage |
| Broche 20 | AVSS — Analog ground reference |
| Broche 21 | AN0/CMP1A/RA0 — Analog input / comparator input / GPIO |
| Broche 22 | AN1/CMP1B/RA1 — Analog input / comparator input / GPIO |
| Broche 23 | AN2/CMP2A/RA4 — Analog input / comparator input / GPIO |
| Broche 24 | AN3/CMP2B/RA5 — Analog input / comparator input / GPIO |
| Broche 25 | AN4/RA8 — Analog input / GPIO |
| Broche 26 | AN5/RA9 — Analog input / GPIO |
| Broche 27 | AN6/RA10 — Analog input / GPIO |
| Broche 28 | AN7/RA11 — Analog input / GPIO |
| Broche 29 | AN8/RB8 — Analog input / GPIO |
| Broche 30 | AN9/RB9 — Analog input / GPIO |
| Broche 31 | AN10/RB10 — Analog input / GPIO |
| Broche 32 | AN11/RB11 — Analog input / GPIO |
| Broche 33 | AN12/RB12 — Analog input / GPIO |
| Broche 34 | AN13/RB13 — Analog input / GPIO |
| Broche 35 | AN14/RB14 — Analog input / GPIO |
| Broche 36 | AN15/RB15 — Analog input / GPIO |
| Broche 37 | VDD — Digital supply voltage |
| Broche 38 | VSS — Digital ground reference |
| Broche 39 | PGC1/EMUC1/RP8 — ICSP clock / JTAG clock / I/O port |
| Broche 40 | PGD1/EMUD1/RP9 — ICSP data / JTAG data / I/O port |
| Broche 41 | PGC2/EMUC2/RA6 — Alternate ICSP clock / I/O port |
| Broche 42 | PGD2/EMUD2/RA7 — Alternate ICSP data / I/O port |
| Broche 43 | MCLR — Master clear reset (active-low) |
| Broche 44 | RP20/SDA2/PMD15/RF4 — Remappable peripheral / I2C2 data / enhanced PWM |
| Broche 45 | RP21/SCL2/PMD14/RF5 — Remappable peripheral / I2C2 clock / enhanced PWM |
| Broche 46 | RP22/PMD13/RF6 — Remappable peripheral / enhanced PWM |
| Broche 47 | RP23/PMD12/RF7 — Remappable peripheral / enhanced PWM |
| Broche 48 | RP24/PMD11/RF8 — Remappable peripheral / enhanced PWM |
| Broche 49 | RP25/PMD10/RF3 — Remappable peripheral / enhanced PWM |
| Broche 50 | RP26/C1RX/PMD9/RF2 — Remappable peripheral / CAN1 RX / enhanced PWM |
| Broche 51 | RP27/C1TX/PMD8/RF1 — Remappable peripheral / CAN1 TX / enhanced PWM |
| Broche 52 | RP19/U2TX/PMD7/RF0 — Remappable peripheral / UART2 TX / enhanced PWM |
| Broche 53 | RP18/U2RX/PMD6/RE8 — Remappable peripheral / UART2 RX / enhanced PWM |
| Broche 54 | RP17/U1TX/RE9 — Remappable peripheral / UART1 TX |
| Broche 55 | RP16/U1RX/RE7 — Remappable peripheral / UART1 RX |
| Broche 56 | SCK1/RG6 — SPI1 clock / GPIO |
| Broche 57 | SDO1/RG7 — SPI1 data out / GPIO |
| Broche 58 | SDI1/RG8 — SPI1 data in / GPIO |
| Broche 59 | SS1/RG9 — SPI1 slave select / GPIO |
| Broche 60 | QEA1/RD0 — Quadrature encoder A input / GPIO |
| Broche 61 | QEB1/RD1 — Quadrature encoder B input / GPIO |
| Broche 62 | INDX1/RD2 — Quadrature encoder index / GPIO |
| Broche 63 | VDD — Digital supply voltage |
| Broche 64 | VSS — Digital ground reference |
Applications typiques
DSPIC33FJ128MC706-I/PT convient pour 6 applications: Brushless DC (BLDC) Motor Control, Three-Phase AC Induction Motor Drive, Switched-Mode Power Supply (SMPS) Digital Control, Industrial Sensor Interface and Signal Conditioning, Sensorless PMSM Motor Control, Automotive Auxiliary Motor and Pump Controllers.
Brushless DC (BLDC) Motor Control
The DSPIC33FJ128MC706-I/PT is engineered for BLDC motor commutation, where its 40 MIPS DSP engine and six PWM channels deliver deterministic field-oriented control at 20 kHz switching. Its hardware MAC executes Park/Clarke transforms and PI controllers in single-cycle latency, while the quadrature encoder interface reads rotor position feedback from Hall sensors or optical encoders. The 128 KB flash accommodates Microchip's MPLAB motor-control libraries and custom FOC code with margin for bootloaders and diagnostic logs.
Recommandé
Three-Phase AC Induction Motor Drive
The DSPIC33FJ128MC706-I/PT drives three-phase induction motors using its three complementary PWM pairs for inverter switches and its 16-channel 10-bit ADC for shunt current sensing. The DSP engine computes the inverse Park transform and slip estimator each PWM cycle, while the eight-channel DMA offloads ADC sampling to reduce CPU interrupt load. Operating from 3.3 V with -40C to +85C tolerance, the device fits industrial motor cabinets where ambient temperature swings are common.
Recommandé
Switched-Mode Power Supply (SMPS) Digital Control
The DSPIC33FJ128MC706-I/PT implements digital control loops for SMPS topologies including PFC, full-bridge, and resonant LLC converters. Its high-resolution PWM (8.32 ns duty-cycle granularity) and fast ADC (1.1 Msps, 10-bit) enable peak current-mode control at 200 kHz switching with deterministic loop latency. The 128 KB flash stores state-space compensator coefficients, soft-start profiles, and PMBus or SMBus telemetry stacks.
Recommandé
Industrial Sensor Interface and Signal Conditioning
The DSPIC33FJ128MC706-I/PT serves as an intelligent front-end for multi-sensor industrial nodes, digitizing strain gauges, thermocouples, and pressure sensors via its 16-channel ADC. The DSP MAC accelerates moving-window filters and FFT-based vibration analysis, while the dual UARTs bridge RS-485 sensor buses and host controllers. The TQFP-64 footprint and 3.3 V single-supply operation simplify integration into DIN-rail mounted signal conditioners.
Recommandé
Sensorless PMSM Motor Control
The DSPIC33FJ128MC706-I/PT enables sensorless PMSM control using BEMF zero-cross detection and sliding-mode observers running on its DSP engine. The 16 KB RAM holds observer state arrays and per-cycle sample buffers, while the 128 KB flash stores gain-scheduling tables for variable-speed operation. Industrial -40C to +85C operation allows deployment in outdoor fan and pump controllers where encoder wiring is impractical.
Recommandé
Automotive Auxiliary Motor and Pump Controllers
The DSPIC33FJ128MC706-I/PT controls automotive auxiliary loads such as electric water pumps, oil pumps, and HVAC blowers where 12 V or 24 V brushed and BLDC motors operate. Its 40 MIPS throughput handles torque-ripple minimization algorithms and CAN/LIN communication stacks. The industrial temperature grade and JTAG/boundary-scan support ease AEC-Q100-aligned validation programs in non-safety-critical automotive subsystems.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour DSPIC33FJ128MC706-I/PT — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | DSPIC33FJ128MC706A-I/PT | DSPIC33FJ128MC706AT-I/PT | DSPIC33FJ128MC706A-I/MR | DSPIC33FJ128MC506A-I/PT | DSPIC33FJ128MC506AT-I/PT | DSPIC33FJ128MC506A-H/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | TQFP-64 (10x10 mm) | TQFP-64 (10x10 mm) - same | TQFP-64 (10x10 mm) - same | QFN-64 equivalent form factor pinout | TQFP-64 (10x10 mm) - same | TQFP-64 (10x10 mm) - same | TQFP-64 (10x10 mm) - same |
| Program Memory (Flash) | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| Maximum CPU Speed | 40 MIPS (50 MHz) | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Core Architecture | dsPIC33F (modified Harvard) | dsPIC33F 'A' revision | dsPIC33F 'A' revision | dsPIC33F 'A' revision | dsPIC33F 'A' revision | dsPIC33F 'A' revision | dsPIC33F 'A' revision |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +125C (H variant) |
| ADC Resolution | 10-bit, 16 channels, 1.1 Msps | 10-bit, 16 channels (A revision may add features) | 10-bit, 16 channels | 10-bit, 16 channels | 10-bit, lower channel count (MC506 variant) | 10-bit, lower channel count | 10-bit, lower channel count |
| PWM Channels | 6 (3 complementary pairs) | 6 (enhanced resolution in A revision) | 6 (enhanced resolution) | 6 (enhanced resolution) | 6 (MC506 variant reduced feature set) | 6 | 6 |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Principaux différenciateurs
- Drop-in 'A' revision upgrade path (vs DSPIC33FJ128MC706A-I/PT)
- Industrial temperature grade across the same family (vs DSPIC33FJ128MC506A-H/PT)
- TQFP-64 footprint consistency across MC family variants (vs DSPIC33FJ128MC510A-I/PF (TQFP-100))
Notes de conception
Place a 100 nF decoupling capacitor as close as possible to each VDD/VSS pin pair, plus a bulk 4.7 uF to 10 uF tantalum or ceramic on each VDD rail. The TQFP-64 thermal pad (if exposed on the package variant) must be soldered to a copper pour of at least 0.5 square inch to keep junction temperature within the -40C to +85C industrial range during sustained PWM activity.
All VSS and VDD pins must be connected on the DSPIC33FJ128MC706-I/PT, even if a given pin appears unused in the schematic. Failure to connect every VSS pin is a known cause of ICSP programming failures and erratic resets per Microchip device errata. Use both PGECx/PGEDx pairs (PGEC1/PGD1 and PGEC2/PGD2) as a paired set; mixing pairs (e.g., PGEC2 with PGD1) will not work for in-circuit serial programming.
For motor-control applications switching at 20 kHz or higher, route the PWM output traces as short and direct as possible to the gate driver inputs, and place the gate driver within 25 mm of the DSC to limit ringing. Add 10 ohm to 22 ohm series damping resistors on PWM outputs if overshoot exceeds the gate-driver input rating, and keep analog ADC traces away from PWM traces to prevent coupled noise on current-sense measurements.
Estimated: at maximum sustained CPU activity of 40 MIPS with all peripherals active, the TQFP-64 package dissipation is typically under 0.5 W. The thermal resistance theta_JA for the TQFP-64 (10x10 mm) is approximately 50 C/W on a standard 2-layer JEDEC board. Sustained industrial ambient of +85C yields a junction temperature rise of approximately 25 C above ambient, well within the +150 C junction maximum - no heatsink required for typical motor-control workloads.
Informations de conformité
RoHS compliance per Microchip product page; lead-free terminal finish confirmed. Industrial temperature grade (I suffix) is rated -40C to +85C. AEC-Q100 qualification status not declared by Microchip for this part number; refer to the DSPIC33FJ automotive family variants if AEC-Q100 is required.
