MC33937APEK - 3-Phase FET Pre-Driver, 1.5A, 40V, SPI | NXP
Référence : MC33937APEK ✗ Fin de vie| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $6.96 | $6,96 |
| 10 | $6.27 | $62,70 |
| 100 | $5.4 | $540,00 |
| 500 | $4.62 | $2 310,00 |
| 1 000 | $3.78 | $3 780,00 |
MC33937APEK Présentation
A Field Effect Transistor pre-driver is an interface IC that sits between a low-power microcontroller and high-current power switches; the pre-driver level-shifts logic-level PWM signals to the high-voltage, high-current gate-drive rails required to switch the power stage efficiently. In the system hierarchy it belongs to motor drivers -> gate drivers -> power management ICs -> mixed-signal semiconductors. The MC33937 family is purpose-built for automotive ECUs such as electric power steering, water/oil pumps, and HVAC blowers.
Key features include three high-side and three low-side gate-drive outputs with programmable dead-time insertion to prevent shoot-through, integrated VLS and VLS_CAP charge-pump-generated gate supply rails that hold the high-side drivers above the phase node, programmable desaturation (VDS) short-circuit detection on each phase, and configurable over-current shutdown. The wide 6 V to 40 V (load-dump tolerant on VPS) input range accommodates 12 V and 24 V automotive buses. The exposed pad of the SOIC-EP-54 package provides a low thermal resistance path, and SPI-accessible registers let designers tune dead-time, blanking time, fault thresholds, and reset behavior from firmware.
Typical applications include automotive 12 V three-phase brushless DC motor drives, electric water and oil pumps, electric power steering (EPS) auxiliary drives, HVAC blower controllers, and industrial three-phase motor pre-driver stages where galvanic isolation between control and power domain is not required. The integrated protection features reduce external component count and PCB area versus discrete gate-drive designs, which is critical under-the-hood where space and reliability are paramount.
When designing with this part, keep decoupling capacitors close to VDD, VLS, and VLS_CAP pins and follow the datasheet PCB layout guidelines to keep the high-current gate-drive loops short. SPI clock speed and CS timing must comply with the timing table in the datasheet.
This page synthesizes distributor pricing, drop-in compatible alternatives, SPI register notes, and practical design tips that go beyond the manufacturer datasheet.
Alternatives de remplacement direct pour MC33937APEK — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec MC33937APEK (même facteur de forme et même empreinte) — différant par Charge Pump, Package.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
MC33937APEFR2
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
MC33937AEF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
MC33937TEF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
MC33937AEF-R2
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
MC33937PEF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
MC33937APEK Valeurs maximales et caractéristiques électriques
| Product Type | 3-phase FET pre-driver (gate driver) |
| Nombre de sorties | 6 (3 high-side + 3 low-side) |
| Supply Voltage (Vdd) | 5 V typical logic supply |
| Battery / VPS Voltage Range | 6 V to 40 V (load-dump tolerant) |
| Gate Drive Current | greater than 1.5 A peak |
| Interface | SPI (Serial Peripheral Interface) |
| Integrated Protections | FET short-circuit / desaturation, over-current, undervoltage |
| Configuration de sortie | Three half-bridge gate drivers for external N-channel MOSFETs |
| Dead-Time Control | Programmable via SPI |
| Charge Pump | Integrated for high-side gate supply (VLS, VLS_CAP) |
| Plage de température de fonctionnement | -40 C to +125 C |
| Boîtier | 54-pin SOIC-EP (exposed pad) |
| Type de montage | Surface Mount |
| Technology | SMARTMOS mixed-signal |
| Automotive Qualification | AEC-Q100 qualified (per NXP product family page) |
Guide de configuration des broches du MC33937APEK 54-pin soic-ep (exposed pad)
Configuration des broches du MC33937APEK (boîtier 54-pin soic-ep (exposed pad)). Ce composant de puissance comporte des bornes de grille, de drain et de source. Pour les boîtiers non polarisés, consultez la fiche technique du fabricant pour l'orientation exacte de la broche 1 et les détails de l'empreinte. Les applications courantes incluent la conception d'alimentations, la commande de moteurs et la commutation de charges.
Aucune donnée de brochage détaillée disponible pour MC33937APEK.
Consultez la fiche technique pour la configuration complète des broches.
Applications typiques
MC33937APEK convient pour 6 applications: Automotive 12V BLDC Water / Oil Pump, Electric Power Steering (EPS) Auxiliary Drive, HVAC Blower Motor Controller, Industrial 24V Three-Phase Motor Pre-Driver Stage, Battery-Powered Cordless Power Tool Motor Drive, Three-Phase PFC / Inverter Pre-Driver.
Automotive 12V BLDC Water / Oil Pump
The MC33937APEK is purpose-built for automotive 12 V BLDC water and oil pumps where reliability under load-dump transients is critical. Its >1.5 A gate-drive current switches the external N-channel MOSFETs at PWM frequencies up to the SPI-configured limit, and the integrated VDS desaturation short-circuit detection protects the pump windings from a stuck-rotor event. With VPS rated to 40 V and AEC-Q100 qualification to 125 C, the device survives under-hood temperatures and inductive kick-back. Designers typically place the pre-driver between the MCU and a three-phase bridge of 30 V / 60 V MOSFETs, sized for 10-30 A continuous. The 54-pin SOIC-EP package's exposed pad must be soldered to a copper pour to keep junction rise under 1.5 W gate-drive dissipation.
Recommandé
Electric Power Steering (EPS) Auxiliary Drive
EPS auxiliary motors require a hardened three-phase pre-driver that can survive reverse-battery and load-dump events while delivering clean PWM to the bridge. The MC33937APEK's 40 V VPS tolerance and integrated over-current shutdown suit EPS sub-systems such as column adjustment or variable-ratio drives. The SPI interface lets the EPS MCU reconfigure dead-time and fault blanking on the fly to match temperature and battery voltage. A typical circuit places the part between an ASIL-rated MCU and a 40 V MOSFET half-bridge, with the SOIC-EP exposed pad tied to a large ground pour for thermal relief under continuous torque demand.
Recommandé
HVAC Blower Motor Controller
HVAC blower modules in modern vehicles demand quiet, efficient variable-speed BLDC control. The MC33937APEK's configurable dead-time and programmable desaturation blanking time let designers tune acoustic performance (low switching losses, smooth commutation) while still protecting the power MOSFETs from shoot-through. Operating from a 12 V battery with 40 V transient tolerance, it pairs naturally with 30 V/40 V N-channel MOSFETs in the blower stage. Designers add a small heatsink or copper pour under the SOIC-EP pad to dissipate the 1-2 W typical gate-drive loss at 20 kHz PWM.
Recommandé
Industrial 24V Three-Phase Motor Pre-Driver Stage
Industrial servo and pump drives on 24 V buses use the MC33937APEK as a pre-driver between an industrial MCU (such as a Kinetis or STM32) and a three-phase IGBT or MOSFET bridge. The 40 V VPS rating gives sufficient headroom above the nominal 24 V bus plus reverse-polarity and inductive transients. The SPI registers let designers program dead-time precisely to the IGBT's turn-off delay, minimizing losses. The exposed pad of the SOIC-EP-54 provides low theta-JA, important in enclosed industrial cabinets where ambient is high.
Recommandé
Battery-Powered Cordless Power Tool Motor Drive
High-power cordless tools that use 18 V to 36 V battery packs need a robust three-phase FET pre-driver; the MC33937APEK's 40 V VPS tolerance accommodates the inductive transients generated when the motor is braked or reversed. The >1.5 A gate drive can switch large TO-220 or DFN MOSFETs at high PWM frequency, allowing compact tool designs. SPI access to fault registers supports tool diagnostics (over-current, short-circuit). The SOIC-EP package keeps the board height low for in-handle placement.
Recommandé
Three-Phase PFC / Inverter Pre-Driver
For three-phase power-factor correction or solar inverter front-ends that build on a low-voltage MCU, the MC33937APEK can pre-drive the IGBT bridge connected to the DC bus. The integrated charge pump (VLS/VLS_CAP) supplies the high-side gate drivers without external bootstrap diodes, simplifying the BOM. AEC-Q100 qualification indicates that even grid-tied industrial inverters in harsh environments benefit from the automotive-grade robustness. Designers must respect the 40 V VPS limit and add a pre-regulator when the DC bus exceeds this.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour MC33937APEK — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | MC33937APEFR2 | MC33937AEF | MC33937TEF | MC33937AEF-R2 | MC33937PEF |
|---|---|---|---|---|---|---|
| Package | 54-pin SOIC-EP | 54-pin SOIC-EP - same | 54-pin SOIC-EP - same | 54-pin SOIC-EP - same | 54-pin SOIC-EP - same | 54-pin SOIC-EP - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Output Configuration | 3-phase, 6 outputs (HS+LS) | 3-phase, 6 outputs (HS+LS) | 3-phase, 6 outputs (HS+LS) | 3-phase, 6 outputs (HS+LS) | 3-phase, 6 outputs (HS+LS) | 3-phase, 6 outputs (HS+LS) |
| Gate Drive Current | greater than 1.5 A | greater than 1.5 A | greater than 1.5 A | greater than 1.5 A | greater than 1.5 A | greater than 1.5 A |
| VPS Battery Voltage | 6 V to 40 V | 6 V to 40 V | 6 V to 40 V | 6 V to 40 V | 6 V to 40 V | 6 V to 40 V |
| Interface | SPI | SPI | SPI | SPI | SPI | SPI |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
| Shipping Format | Tape & Reel (APEK) | Reel R2 | Tube (AEF) | Tube (TEF) | Reel R2 | Tube (PEF) |
Principaux différenciateurs
- Integrated charge pump for high-side gate supply (vs MC33939)
- Greater than 1.5 A peak gate drive (vs IRS2334 (28-SOIC, 0.2 A peak))
- SPI-configurable fault and timing thresholds (vs Fixed-threshold gate drivers)
Notes de conception
Estimated: PCB layout for the MC33937APEK should place a 0.47 uF ceramic decoupling capacitor on VDD, a 2.2 uF on VLS, and a 2.2 uF on VLS_CAP as close as possible to the respective pins (within 2-3 mm). The SOIC-EP exposed pad must be soldered to a continuous copper pour - at least 1 square inch of 2 oz copper - to keep theta-JA low and dissipate the gate-drive losses. Keep the high-current gate-drive loops (gate-source of the driven MOSFET) short to minimize parasitic inductance that otherwise causes ringing and possible shoot-through.
Estimated: at 20 kHz PWM into a MOSFET with 50 nC Qg, the gate-drive loss per channel is roughly VLS x Qg x fsw = 12 V x 50 nC x 20 kHz = 12 mW per channel, or 72 mW total for six channels. With reasonable PCB layout (1 sq inch copper pour) this is well within the SOIC-EP's thermal envelope. As the switching frequency rises above 50 kHz or the MOSFET Qg exceeds 100 nC, evaluate additional heatsinking or copper area.
Avoid hot-plugging the VPS battery supply to a powered-down MC33937APEK; always allow the VDD logic supply to be present before VPS exceeds 6 V to enter normal regulation. Configure the dead-time, blanking time, and fault masks via SPI before enabling any gate drive output. Per NXP datasheet, the integrated charge pump needs the values stated above for VDD, VLS, and VLS_CAP to guarantee start-up - deviations can prevent the high-side outputs from turning on cleanly.
Informations de conformité
AEC-Q100 qualification per NXP MC33937 family documentation. RoHS/REACH status was not confirmed in the verified web data; verify on the manufacturer PCN before committing to production. Lead-free process per NXP SMARTMOS family standards. Conflict-minerals compliance per NXP corporate policy.
