PIC24FJ128GB206-I/MR - 16-bit 32MHz 128KB Flash USB MCU | Microchip
Référence : PIC24FJ128GB206-I/MR ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $6.32 | $6,32 |
| 10 | $5.84 | $58,40 |
| 100 | $5.21 | $521,00 |
| 500 | $4.62 | $2 310,00 |
| 1 000 | $4.14 | $4 140,00 |
PIC24FJ128GB206-I/MR Présentation
What is a 16-bit microcontroller? A microcontroller (MCU) is a single-chip computer containing a CPU core, non-volatile program memory (Flash), volatile working memory (RAM), and a rich set of on-chip peripherals such as timers, communication interfaces, and analog blocks. The PIC24FJ128GB206-I/MR belongs to the broader taxonomy: microcontroller -> 16-bit MCU -> PIC24F family -> PIC24FJ GB2 sub-family -> Microchip 16-bit secure connectivity MCU.
Key features include 128 KB (43K x 24) of self-programmable Flash, 96 KB of RAM, USB 2.0 OTG with dual-role (host or peripheral), integrated hardware crypto engine with key storage, a true random number generator, multiple UART/SPI/I2C peripherals, a 10-bit ADC, and a parallel master port for graphics displays. The XLP variant provides nanoWatt deep-sleep currents suitable for battery-powered applications.
Architecturally, the device uses a modified Harvard RISC core with a 16-bit data path and 24-bit instruction width, supporting 32 MIPS at 32 MHz. Integrated peripherals are mapped via a Peripheral Pin Select (PPS) system, allowing flexible function-to-pin routing. The hardware crypto engine accelerates AES, DES, 3DES, SHA-1, SHA-256, and HMAC operations offloaded from the CPU.
Typical applications include USB peripherals (HID, CDC, mass storage), secure IoT endpoints, battery-powered wearables, graphics display controllers, secure token/authentication devices, and industrial data loggers with on-board encryption.
When designing, allocate adequate decoupling (100 nF + 4.7 µF) near each VDD pin and follow Microchip's PGEC/PGED layout guidelines. The parallel master port shares pins with several peripherals - planning the pin map early avoids late-stage rework.
This page synthesizes distributor pricing, drop-in same-family alternatives, and design notes not consolidated on any single manufacturer or distributor page.
Alternatives de remplacement direct pour PIC24FJ128GB206-I/MR — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC24FJ128GB206-I/MR (même facteur de forme et même empreinte) — différant par Package, Maximum CPU Speed, ADC, Family, Mounting Type.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC24FJ128GB206T-I/MR
✅ Remplacement direct✓ En stock
$3.6 / unité
Voir la fiche technique →PIC24FJ256GB206-I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC24FJ128DA206-I/MR
✅ Remplacement direct✓ En stock
$4.71 / unité
Voir la fiche technique →PIC24FJ128GA606-I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC24FJ128GA106-I/MR
✅ Remplacement direct✓ En stock
$4.15 / unité
Voir la fiche technique →PIC24FJ128GB206-I/MR Valeurs maximales et caractéristiques électriques
| Core | PIC 16-bit RISC (modified Harvard) |
| Family | PIC24FJ GB2 (eXtreme Low Power) |
| Maximum CPU Speed | 32 MIPS at 32 MHz |
| Program Flash | 128 KB (43K x 24 words) |
| RAM | 96 KB |
| Supply Voltage (VDD) | 2.5 V / 3.3 V |
| Température de fonctionnement | -40 C to +85 C (Industrial, "-I") |
| Boîtier | 64-pin VQFN (9x9 mm) with exposed pad |
| USB | USB 2.0 On-The-Go, dual-role (host or peripheral) |
| Crypto Engine | Integrated AES / DES / 3DES / SHA / HMAC |
| Random Number Generator | Hardware TRNG |
| ADC | 10-bit, multi-channel |
| Graphics | Parallel Master Port for external display |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant |
Configuration des broches de PIC24FJ128GB206-I/MR
| Broche 1 | RA0 — GPIO / analog input / peripheral pin select |
| Broche 2 | RA1 — GPIO / analog input / peripheral pin select |
| Broche 3 | RA2 — GPIO / analog input / peripheral pin select |
| Broche 4 | RA3 — GPIO / analog input / peripheral pin select |
| Broche 5 | RA4 — GPIO / peripheral pin select |
| Broche 6 | RA5 — GPIO / peripheral pin select |
| Broche 7 | RA6 — GPIO / peripheral pin select |
| Broche 8 | RA7 — GPIO / peripheral pin select |
| Broche 9 | RB0 — GPIO / peripheral pin select |
| Broche 10 | RB1 — GPIO / peripheral pin select |
| Broche 11 | RB2 — GPIO / peripheral pin select |
| Broche 12 | RB3 — GPIO / peripheral pin select |
| Broche 13 | RB4 — GPIO / peripheral pin select |
| Broche 14 | RB5 — GPIO / peripheral pin select |
| Broche 15 | RB6 — GPIO / peripheral pin select |
| Broche 16 | RB7 — GPIO / peripheral pin select |
| Broche 17 | RC0 — GPIO / peripheral pin select |
| Broche 18 | RC1 — GPIO / peripheral pin select |
| Broche 19 | RC2 — GPIO / peripheral pin select |
| Broche 20 | RC3 — GPIO / peripheral pin select |
| Broche 21 | RC4 — GPIO / peripheral pin select |
| Broche 22 | RC5 — GPIO / peripheral pin select |
| Broche 23 | RC6 — GPIO / peripheral pin select |
| Broche 24 | RC7 — GPIO / peripheral pin select |
| Broche 25 | RD0 — GPIO / peripheral pin select |
| Broche 26 | RD1 — GPIO / peripheral pin select |
| Broche 27 | RD2 — GPIO / peripheral pin select |
| Broche 28 | RD3 — GPIO / peripheral pin select |
| Broche 29 | RD4 — GPIO / peripheral pin select |
| Broche 30 | RD5 — GPIO / peripheral pin select |
| Broche 31 | RD6 — GPIO / peripheral pin select |
| Broche 32 | RD7 — GPIO / peripheral pin select |
| Broche 33 | VDD — Positive supply (2.5 V / 3.3 V) |
| Broche 34 | VSS — Ground |
| Broche 35 | RE0 — GPIO / peripheral pin select |
| Broche 36 | RE1 — GPIO / peripheral pin select |
| Broche 37 | RE2 — GPIO / peripheral pin select |
| Broche 38 | RE3 — GPIO / peripheral pin select |
| Broche 39 | RE4 — GPIO / peripheral pin select |
| Broche 40 | RE5 — GPIO / peripheral pin select |
| Broche 41 | RE6 — GPIO / peripheral pin select |
| Broche 42 | RE7 — GPIO / peripheral pin select |
| Broche 43 | RF0 — GPIO / peripheral pin select |
| Broche 44 | RF1 — GPIO / peripheral pin select |
| Broche 45 | RF2 — GPIO / peripheral pin select |
| Broche 46 | RF3 — GPIO / peripheral pin select |
| Broche 47 | RF4 — GPIO / peripheral pin select |
| Broche 48 | RF5 — GPIO / peripheral pin select |
| Broche 49 | RF6 — GPIO / peripheral pin select |
| Broche 50 | RF7 — GPIO / peripheral pin select |
| Broche 51 | RG0 — GPIO / peripheral pin select |
| Broche 52 | RG1 — GPIO / peripheral pin select |
| Broche 53 | RG2 — GPIO / peripheral pin select (D+) |
| Broche 54 | RG3 — GPIO / peripheral pin select (D-) |
| Broche 55 | RG6 — GPIO / peripheral pin select |
| Broche 56 | RG7 — GPIO / peripheral pin select |
| Broche 57 | RG8 — GPIO / peripheral pin select |
| Broche 58 | RG9 — GPIO / peripheral pin select |
| Broche 59 | VDD — Positive supply (2.5 V / 3.3 V) |
| Broche 60 | VSS — Ground |
| Broche 61 | OSC1 — Crystal oscillator input |
| Broche 62 | OSC2 — Crystal oscillator output |
| Broche 63 | MCLR — Master clear reset (active low) |
| Broche 64 | EP — Exposed thermal pad (must be soldered to VSS for thermal dissipation) |
Applications typiques
PIC24FJ128GB206-I/MR convient pour 6 applications: USB HID / CDC Peripheral Devices, Secure IoT Sensor Endpoints, Battery-Powered Wearables and Fitness Bands, Graphics Display Controllers (TFT via PMP), Secure Authentication Tokens and Crypto Keys, Industrial Data Loggers with Encryption.
USB HID / CDC Peripheral Devices
The PIC24FJ128GB206-I/MR fits USB HID and CDC peripheral designs because its integrated USB 2.0 Full-Speed transceiver, 96 KB RAM, and 32 MIPS core remove the need for an external PHY or MCU companion. According to the Microchip GB2 datasheet, the USB OTG module supports HID, CDC, mass storage, and vendor-class device stacks in ROM-free configuration, with the 128 KB Flash holding both the USB stack and the application. The hardware crypto engine can simultaneously run AES-128 on packets, providing inline encryption for HID authentication tokens. Developers should allocate a 1.5 kB endpoint buffer and use the PPS system to free D+/D- for application I/O.
Recommandé
Secure IoT Sensor Endpoints
The PIC24FJ128GB206-I/MR is well suited to secure battery-powered IoT sensor endpoints because the eXtreme Low Power (XLP) technology delivers sub-uA sleep currents, the hardware AES/SHA engine accelerates TLS handshakes off-CPU, and the 96 KB RAM handles fragmented TLS records without external memory. According to Microchip's XLP datasheet section, the deep-sleep current can drop below 100 nA with RTC running, enabling multi-year coin-cell operation. The integrated TRNG provides the entropy source for cryptographic keys, removing the need for an external secure element in many low-risk deployments.
Recommandé
Battery-Powered Wearables and Fitness Bands
The PIC24FJ128GB206-I/MR suits wearables because the XLP sleep modes and 32 MHz/32 MIPS performance envelope let the device wake, sample sensors, perform on-chip AES-encrypted logging, and return to deep sleep within milliseconds - all on a coin cell. The 64-pin VQFN at 9x9 mm keeps the PCB footprint small, and the rich PPS pin mapping lets designers route SPI/I2C sensors, an OLED display, and a USB charging interface without bus contention. The 96 KB RAM also enables on-device buffering of up to 10 minutes of sensor data before transmission.
Recommandé
Graphics Display Controllers (TFT via PMP)
The PIC24FJ128GB206-I/MR drives small TFT displays through the Parallel Master Port (PMP) and benefits from 96 KB of RAM which is enough to host a full QVGA frame buffer (320x240x16 = 153 KB requires external RAM) or a partial WQVGA buffer (e.g., 160x240x16 = 76.5 KB) entirely on-chip. The PMP supports 8-bit and 16-bit data widths and address-latching for direct connection to ILI9341-style controllers. Combined with the 32 MIPS core, this enables smooth UI updates at 30+ FPS for menus, charts, and simple animations.
Recommandé
Secure Authentication Tokens and Crypto Keys
The PIC24FJ128GB206-I/MR is ideal for hardware authentication tokens because the integrated hardware AES-128/192/256, SHA-256, and HMAC engine, combined with the true random number generator and secure key storage, provide the building blocks for FIDO2 / TOTP / HMAC-based challenge-response tokens. The 32 MIPS core responds to a challenge in under 50 ms, and the XLP sleep currents allow the token to sit idle for years on a single CR2032. The USB OTG port doubles as the host interface, supporting HID and CCID smart-card-style protocols natively.
Recommandé
Industrial Data Loggers with Encryption
The PIC24FJ128GB206-I/MR fits industrial encrypted data loggers because the wide operating temperature (-40 C to +85 C), large RAM (96 KB) for buffering, and integrated AES/SHA engine for at-rest encryption eliminate the need for a separate crypto co-processor. According to the Microchip family datasheet, multiple UART, SPI, and I2C interfaces permit simultaneous connection to industrial sensors (Modbus, I2C sensors, SPI ADCs). The 128 KB Flash hosts a real-time OS or scheduler plus the encrypted file system, simplifying BOM and PCB layout in space-constrained DIN-rail enclosures.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC24FJ128GB206-I/MR — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC24FJ128GB206T-I/MR | PIC24FJ256GB206-I/MR | PIC24FJ128DA206-I/MR | PIC24FJ128GA606-I/MR | PIC24FJ128GA106-I/MR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-VQFN (9x9 mm, MR) | 64-VQFN (9x9 mm, MR) - same | 64-VQFN (MR) - same | 64-VQFN (MR) - same | 64-VQFN (MR) - same | 64-VQFN (MR) - same |
| Program Flash | 128 KB | 128 KB | 256 KB | 128 KB | 128 KB | 128 KB |
| USB Support | USB 2.0 OTG (host + device) | USB 2.0 OTG (host + device) | USB 2.0 OTG (host + device) | USB 2.0 device (no OTG) | USB 2.0 device (no OTG) | No USB |
| Hardware Crypto Engine | Yes (AES / DES / SHA / HMAC) | Yes (AES / DES / SHA / HMAC) | Yes (AES / DES / SHA / HMAC) | No | No | No |
| TRNG (True RNG) | Yes | Yes | Yes | No | No | No |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
Principaux différenciateurs
- Largest RAM in GB2 family (vs PIC24FJ128DA206-I/MR)
- Integrated hardware crypto engine and TRNG (vs PIC24FJ128GA606-I/MR)
- USB On-The-Go dual-role (vs PIC24FJ128GA106-I/MR)
- Industrial temperature grade and XLP sleep currents (vs PIC24FJ128GB202-I/MM (28-pin cousin))
Notes de conception
Place a 100 nF ceramic decoupling capacitor within 5 mm of each VDD pin and a bulk 4.7 uF tantalum or ceramic capacitor near the package. According to Microchip PIC24F hardware design guidelines, inadequate decoupling on the 2.5 V / 3.3 V rails is the leading cause of USB enumeration failures and crypto-engine lock-ups. For battery designs, switch to the internal LDO mode and disable the voltage regulator if not required.
The 64-pin VQFN has an exposed thermal pad that must be soldered to a continuous VSS copper pour with at least 8 thermal vias to the inner ground plane. The PGECx/PGEDx programming pins are sensitive to crosstalk - per Northern Software's PIC24FJ128GB206 application note, add a 20 pF capacitor from PGECx to VSS close to the IC if programming reliability issues appear. Keep USB D+/D traces 90-ohm differential, length-matched within 2 mm, and routed over a continuous ground plane.
Do not enable the parallel master port (PMP), USB, and crypto engine simultaneously without budgeting for combined current - peak USB enumeration plus AES can briefly exceed 60 mA. The PPS (Peripheral Pin Select) registers must be unlocked and locked around configuration writes; forgetting this causes silent peripheral failures. For OTA firmware updates, partition Flash into a 64 KB bootloader and 64 KB application slot to allow fail-safe rollback.
Route USB D+ (RG2) and D- (RG3) as a 90 ohm differential pair with no splits, keep total length under 50 mm, and place the 15 kohm pull-down on D- as close to the MCU as possible. The integrated USB transceiver requires a 1 uF capacitor on VBUS for OTG host mode SRP detection. For CE/FCC emissions compliance, place a common-mode choke on D+/D- if the cable exits the enclosure.
Informations de conformité
RoHS and lead-free per Microchip product page. Not AEC-Q100 qualified - consult Microchip automotive PIC24F portfolio for automotive-grade variants. Halogen-free status not explicitly listed in provided data.
