PIC32MX130F064B-I/SS - 40MHz 32-bit MCU 64KB Flash | Microchip
Référence : PIC32MX130F064B-I/SS ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $3.84 | $3,84 |
| 10 | $3.45 | $34,50 |
| 100 | $3.06 | $306,00 |
| 500 | $2.74 | $1 370,00 |
| 1 000 | $2.43 | $2 430,00 |
PIC32MX130F064B-I/SS Présentation
A 32-bit microcontroller (MCU) is an integrated circuit that combines a 32-bit processor core, program memory, data memory, and a set of on-chip peripherals into a single chip. Within the broader category hierarchy, the PIC32MX130F064B-I/SS belongs to the 32-bit MCU family, which in turn falls under microcontrollers (MCU), under Integrated Circuits, under semiconductors. The PIC32MX1xx/2xx family is Microchip's entry-level 32-bit MCU line, targeting cost-sensitive applications that need more performance than 8/16-bit MCUs can deliver but do not require the higher pin count or features of the PIC32MZ family.
Key features of the PIC32MX130F064B-I/SS include a 2.3 V to 3.6 V supply voltage range (single 2.5 V/3.3 V operation), 21 I/O ports, 5 general-purpose 16-bit timers, an on-chip temperature sensor, and full MIPS32 M4K instruction-set compatibility for code portability across the family. The PPS block decouples peripheral pin assignments from physical pins, simplifying PCB layout and BOM management. The CTMU provides the constant-current source needed for both mTouch capacitive sensing and 1 ns edge-time-stamping on capture inputs.
Architecture is a single-cycle MIPS32 M4K 5-stage pipeline with hardware multiply/divide and a configurable prefetch cache. The bus matrix splits Flash (64 KB) and SRAM (16 KB) into separate program/data paths, allowing DMA and CPU to operate concurrently without stalling. PMP can drive external graphics LCDs or FIFOs in master mode.
Typical applications include low-cost 32-bit control nodes in industrial automation, graphics front panels with simple monochrome/color LCDs driven by PMP, mTouch capacitive user interfaces for white goods and audio panels, audio decoder panels via the two I2S modules, and low-power sensor hubs where the <0.5 mA/MHz active current helps meet energy budgets. Industrial-grade -40°C to +85°C operation also makes it a fit for factory-floor equipment.
When designing with this part, choose decoupling per the datasheet (typically 0.1 µF + bulk) and assign PPS mappings early in firmware - changing them after the PCB is laid out is impossible without re-spin. The internal 8 MHz RC oscillator with PLL can drive the 40 MHz core, eliminating an external crystal in cost-sensitive designs.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
Alternatives de remplacement direct pour PIC32MX130F064B-I/SS — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC32MX130F064B-I/SS (même facteur de forme et même empreinte) — différant par Package, ADC, Timers, Operating Temperature, Operating Temperature Range.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC32MX130F064BT-I/SS
✅ Remplacement direct✓ En stock
$1.96 / unité
Voir la fiche technique →PIC32MX130F064B-I/SS Valeurs maximales et caractéristiques électriques
| Core | MIPS32 M4K 32-bit RISC |
| Maximum CPU Clock | 40 MHz |
| Program Memory (Flash) | 64 KB (64K x 8) |
| Data Memory (SRAM) | 16 KB |
| Tension d'alimentation | 2.3 V to 3.6 V |
| Plage de température de fonctionnement | -40 °C to +85 °C (Industrial) |
| Active CPU Current | < 0.5 mA/MHz |
| I/O Pins | 21 |
| I2S / SPI Modules | 2 |
| Parallel Master Port (PMP) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| CTMU (Capacitive Touch / 1 ns time measurement) | Yes |
| General-Purpose Timers | 5 × 16-bit |
| On-chip Temperature Sensor | Yes |
| Boîtier | 28-pin SSOP (5.30 mm body) |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant |
Configuration des broches de PIC32MX130F064B-I/SS
| Broche 1 | RF0 — Remappable I/O / INT0 |
| Broche 2 | RF1 — Remappable I/O |
| Broche 3 | SDA1/RG45 — I2C1 SDA / remappable I/O |
| Broche 4 | SCL1/RG44 — I2C1 SCL / remappable I/O |
| Broche 5 | RA0 — Remappable I/O |
| Broche 6 | RA1 — Remappable I/O |
| Broche 7 | RB0 — Programmable pull-up, remappable I/O |
| Broche 8 | RB1 — Remappable I/O |
| Broche 9 | RB2 — Remappable I/O |
| Broche 10 | RB3 — Remappable I/O |
| Broche 11 | RB4 — Remappable I/O |
| Broche 12 | RB5 — Remappable I/O |
| Broche 13 | RB7 — Remappable I/O |
| Broche 14 | RB8 — Remappable I/O |
| Broche 15 | VSS — Ground |
| Broche 16 | VDD — Core / I/O supply 2.3-3.6 V |
| Broche 17 | RB9 — Remappable I/O |
| Broche 18 | RB10 — Remappable I/O |
| Broche 19 | RB11 — Remappable I/O |
| Broche 20 | RB13 — Remappable I/O |
| Broche 21 | RB14 — Remappable I/O |
| Broche 22 | RB15 — Remappable I/O |
| Broche 23 | RF4 — Remappable I/O |
| Broche 24 | RF5 — Remappable I/O |
| Broche 25 | RC1 — Remappable I/O |
| Broche 26 | RC2 — Remappable I/O |
| Broche 27 | RC3 — Remappable I/O |
| Broche 28 | RC4 — Remappable I/O |
Applications typiques
PIC32MX130F064B-I/SS convient pour 6 applications: Industrial Control Node, mTouch Capacitive User Interface, Audio Front Panel with I2S Codec, Graphics Front Panel with PMP LCD, USB Device / Embedded Host, Low-Power Sensor Hub.
Industrial Control Node
The PIC32MX130F064B-I/SS is well-suited for cost-sensitive 32-bit industrial control nodes, where the 40 MHz MIPS32 M4K core, 64 KB Flash, 16 KB SRAM, and industrial -40°C to +85°C operating range provide ample headroom for small protocol stacks (Modbus, RS-485 framing, simple TCP/IP via SPI-to-Ethernet bridges). The part's <0.5 mA/MHz active CPU current keeps 3.3 V regulator thermal stress low even at full 40 MHz operation. Designers typically pair it with an external RS-485 transceiver (e.g., MAX3485) and a digital isolator; the two I2S/SPI modules let the same firmware drive both fieldbus and a local HMI LCD through the parallel master port, eliminating a separate display controller.
Recommandé
mTouch Capacitive User Interface
The PIC32MX130F064B-I/SS integrates Microchip's CTMU peripheral - a constant-current source + timer pair that supports up to 1 ns high-resolution edge measurement - which is the foundation of mTouch capacitive buttons, sliders, and proximity sensing. The 21 GPIO pins give enough capacity for typical appliance front-panel designs (8-12 touch channels + LCD + LED indicators). The 64 KB Flash comfortably fits the mTouch library plus an application UI state machine. PPS allows touch channels, the LCD data bus, and PWM backlight drive to be reassigned without PCB re-spins. Compared with discrete touch ICs, the integrated approach reduces BOM and lets the same MCU host the capacitive UI and the appliance's main control loop.
Recommandé
Audio Front Panel with I2S Codec
The PIC32MX130F064B-I/SS includes two I2S/SPI modules that can drive an external audio codec (e.g., SGTL5000, WM8960) for stereo line/headphone playback in a low-cost audio front panel. The 40 MHz core delivers enough MIPS to run a 48 kHz / 16-bit audio stream plus a small UI firmware in a single-threaded loop or with a cooperative scheduler. The on-chip temperature sensor enables thermal-compensated amplifier bias if the board integrates a Class-D amp. The 16 KB SRAM is sufficient for a small ring buffer plus UI state, though a 96 kHz path will need DMA-style double buffers to avoid underruns.
Recommandé
Graphics Front Panel with PMP LCD
The PIC32MX130F064B-I/SS Parallel Master Port (PMP) can drive an external graphics LCD in master mode - typically a small 128x64 monochrome OLED or a 320x240 TFT controller IC - for graphical front-panel displays. PMP supports 8-bit or 16-bit data, dedicated enable, and address-latch pins, offloading the CPU versus bit-banged solutions. Designers pair PMP with PPS-remapped GPIO for SPI/I2C peripherals (sensor, EEPROM). The 64 KB Flash fits small graphics libraries plus full font tables; for richer GUIs, the larger-memory PIC32MX250/350 family members offer 128 KB Flash with the same SSOP-28 footprint.
Recommandé
USB Device / Embedded Host
The PIC32MX130F064B-I/SS integrates a USB 2.0 full-speed (12 Mbps) controller with on-chip transceiver supporting device, host, and OTG operation, per the Microchip product page. This makes the part a fit for low-cost USB peripherals (HID, CDC, vendor-class) and embedded USB hosts reading mass-storage or HID devices. The 64 KB Flash and 16 KB SRAM comfortably fit Microchip's USB stack (Microchip Libraries for Applications or MPLAB Harmony USB). The 28-SSOP footprint keeps the design compact; designers add a 48 MHz crystal or use the USB PLL mode for 48 MHz USB clocking without an extra part.
Recommandé
Low-Power Sensor Hub
The PIC32MX130F064B-I/SS <0.5 mA/MHz active current and configurable sleep / deep-sleep modes make it a viable sensor-hub MCU for battery-powered measurement nodes reading temperature, humidity, or simple motion sensors. The on-chip temperature sensor can double as a local ambient reading. The CTMU's 1 ns resolution supports precise time-of-flight or pulse-width measurements, and the 21 GPIO are sufficient for multiple I2C/SPI sensor buses. Combined with PPS-based pin flexibility, the same hardware can host alternative sensor sets by firmware-only changes, which is valuable across a sensor-hub product family.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC32MX130F064B-I/SS — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC32MX130F064BT-I/SS | PIC32MX130F064B-I/SP |
|---|---|---|---|
| Package | 28-SSOP | 28-SSOP (same) | 28-SPDIP (NOT same footprint) |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash | 64 KB | 64 KB | 64 KB |
| SRAM | 16 KB | 16 KB | 16 KB |
| Max CPU Clock | 40 MHz | 40 MHz | 40 MHz |
| Core | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K |
| USB | USB FS OTG | USB FS OTG | USB FS OTG |
| Operating Temperature | -40 to +85 °C (I) | -40 to +85 °C (I) | -40 to +85 °C (I) |
| PCB Footprint | SSOP-28 surface-mount | SSOP-28 surface-mount | SPDIP-28 through-hole (NOT drop-in) |
Principaux différenciateurs
- Highest memory density in PIC32MX1XX/2XX SSOP-28 family (vs PIC32MX120F032B-I/SS)
- Includes USB 2.0 full-speed OTG controller (vs PIC32MX110F016B-I/SS)
- Industry-standard SSOP-28 surface-mount package (vs PIC32MX130F064B-I/SP)
Notes de conception
Place a 0.1 µF ceramic decoupling capacitor within 5 mm of each VDD pin and a bulk 10 µF tantalum or ceramic on the 3.3 V rail near the MCU. Microchip's PIC32MX hardware checklist recommends VDD rise time of ≤ 50 ms; an RC ramp or supervisor may be needed if the upstream rail ramps slowly. Estimated: at 40 MHz full active CPU + peripherals, total VDD current is roughly 25-35 mA; size the regulator for at least 50 mA to leave margin.
The 28-SSOP is a fine-pitch (0.65 mm) SMD package - use a Type-A land pattern with 0.40 mm × 0.45 mm pads and ensure solder mask slivers are removed between pads. Keep analog and digital ground domains star-grounded at the MCU VSS pin, and route the crystal traces short and symmetric with a ground guard ring. PPS-based pin reassignment allows late-stage PCB fixes without re-spinning the board.
Common pitfalls: (1) running the 40 MHz core from the internal FRC without first enabling the PLL and waiting for the LOCK bit - firmware will run at 8 MHz and peripherals (UART baud, I2S sample rate) will be wrong; (2) forgetting that <0.5 mA/MHz is per-MHz active CPU only and excludes peripherals that can dominate total power; (3) leaving the JTAG pins TMS/TCK floating in production - Microchip recommends pulling them in a defined state to avoid accidental debug-entry after reset.
USB D+/D- traces must be 90 Ω differential, length-matched within 1 mm, and routed over a continuous ground plane with no splits. The on-chip USB transceiver needs the 48 MHz USB clock - either from an external crystal on the dedicated USB clock pins or from the 8 MHz FRC + PLL with the USB PLL mode enabled. A USB bus termination pull-up (1.5 kΩ on D-) must be switchable for host/device/OTG operation.
Informations de conformité
RoHS-compliant per Microchip product page and OnlineComponents listing. Lead-free reflow profile per JEDEC J-STD-020. Industrial temperature grade (-40 to +85 °C). Not AEC-Q100 qualified - for automotive designs select a -V or -E suffix part or use an external watchdog.
