10AS032H2F34E2LG vs 10AS032H2F35E1HG तुलना
विस्तृत दोनों ओर की तुलना 10AS032H2F34E2LG द्वारा Intel और 10AS032H2F35E1HG द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | 10AS032H2F34E2LG | 10AS032H2F35E1HG |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | Arria 10 SX | — |
| Device Tier | 10AS032 (mid-density) | — |
| Configuration | SoC FPGA (HPS + FPGA fabric) | Serial (E1 suffix) |
| Logic Elements | 320,000 | 320,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Operating Frequency | 1.5 GHz | — |
| पैकेज | 1152-ball FC-FBGA (F34), 35 x 35 mm | 1152-ball FCBGA (35 x 35 mm) |
| Speed Grade | 2 | — |
| Temperature Grade | E2 (commercial/extended) | — |
| On-chip Memory (M20K blocks) | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] | — |
| DSP Blocks | Variable-precision, IEEE 754 single-precision FP support | — |
| Transceivers | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] | — |
| Memory Controller Hard IP | DDR4, DDR3, QDRII+, RLDRAM3 | — |
| Process Node | 20 nm | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| RoHS स्थिति | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Form of Terminal | Ball (BGA) | — |
| Terminal Pitch | 1 mm | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| सप्लाई वोल्टेज | — | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| MSL स्तर | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |