A3PE3000L-FG896I vs A3PE3000L-FGG896M तुलना
विस्तृत दोनों ओर की तुलना A3PE3000L-FG896I द्वारा Microchip Technology और A3PE3000L-FGG896M द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A3PE3000L-FG896I - ProASIC3L Flash FPGA 620 I/O | Microchip
A3PE3000L-FG896I ✓ सक्रियMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ सक्रियविशेषता तुलना
| पैरामीटर | A3PE3000L-FG896I | A3PE3000L-FGG896M |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | ProASIC3L (Low Power Flash FPGA) | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Logic Cells | 75264 | 75,264 |
| User I/O | 620 | — |
| Core Voltage | 1.2 V to 1.5 V | 1.2 V to 1.5 V |
| I/O Voltage (minimum) | 1.2 V | — |
| Configuration Memory | On-chip Flash (single-chip, nonvolatile) | — |
| Low Power Feature | Flash*Freeze technology (40% dynamic / 50% static power reduction) | — |
| पैकेज | 896-BGA (FBGA-896) | 896-ball FBGA (FGG896), 1 mm pitch |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Temperature Grade | Industrial (-I suffix) | — |
| Reprogrammability | Yes (in-system reprogrammable) | — |
| RoHS स्थिति | RoHS Non-Compliant (per distributor listing) | — |
| Lead Free Status | Contains Lead (per distributor listing) | — |
| Speed Grade | [DATA_NEEDED: speed grade / grade code] | — |
| ऑपरेटिंग तापमान रेंज | [DATA_NEEDED: exact operating temperature range in C] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM block capacity] | — |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| सप्लाई वोल्टेज | — | 1.5 V |
| Logic Family | — | CMOS |
| ऑपरेटिंग तापमान | — | 0 to 70 C |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |