A3PE3000L-FGG896 vs A3PE3000L-FGG896M तुलना
विस्तृत दोनों ओर की तुलना A3PE3000L-FGG896 द्वारा Microchip Technology और A3PE3000L-FGG896M द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A3PE3000L-FGG896 - 3M Gate Flash FPGA | Microchip Technology
A3PE3000L-FGG896 ✓ सक्रियMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ सक्रियविशेषता तुलना
| पैरामीटर | A3PE3000L-FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| System Gates | 3,000,000 | 3,000,000 |
| Logic Cells | 75,264 | 75,264 |
| Total SRAM | 504 kbits | — |
| User I/Os (FGG896) | 620 | — |
| पैकेज | 896-ball FBGA (FGG896), 1.0 mm pitch | 896-ball FBGA (FGG896), 1 mm pitch |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Core Supply Voltage | 1.2 V to 1.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage range] | — |
| ऑपरेटिंग तापमान | 0 C to +70 C | 0 to 70 C |
| Logic Family | CMOS | CMOS |
| Process Technology | 130-nm, 7-layer metal (6 copper), flash-based | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Flash*Freeze Support | Yes | — |
| Live-At-Power-Up | Level 0 support | — |
| Reconfiguration | Reprogrammable (in-system programmable) | — |
| Lead-Free Finish | Yes | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | — |
| Clock Inputs | [DATA_NEEDED: number of clock conditioning circuits/PLLs] | — |
| Speed Grade | [DATA_NEEDED: speed grade for -FGG896 base part] | — |
| Power Consumption | [DATA_NEEDED: typical static/dynamic power] | — |
| Ball Count | 896 | — |
| Family | — | ProASIC3L (Flash-based FPGA) |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| सप्लाई वोल्टेज | — | 1.5 V |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |