A42MX24-2PLG84I vs A42MX09-2PLG84I तुलना
विस्तृत दोनों ओर की तुलना A42MX24-2PLG84I द्वारा Microchip Technology और A42MX09-2PLG84I द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ सक्रियMicrochip Technology
A42MX09-2PLG84I - 14K Gate 5V FPGA 84-PLCC | Microchip
A42MX09-2PLG84I ✓ सक्रियविशेषता तुलना
| पैरामीटर | A42MX24-2PLG84I | A42MX09-2PLG84I |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | MX (42MX) | MX (42MX) |
| System Gates | 36000 gates | 14000 |
| Logic Cells | 912 cells | 336 |
| User I/O | 72 | — |
| Technology | 0.45 um antifuse | — |
| Core Architecture Voltage | 5.0 V | — |
| I/O Voltage Support | 3.3 V / 5.0 V mixed | — |
| Speed Grade | -2 | -2 |
| Programmability | One-Time Programmable (antifuse) | — |
| ऑपरेटिंग तापमान | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| पैकेज | 84-PLCC (J-Lead) | 84-PLCC (J-Lead), surface mount |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Configuration | No external boot device required | — |
| Dedicated Decode Blocks | D-modules (wide-input AND, CPLD-like) | — |
| RoHS स्थिति | Lead Free (per Kynix listing) | Lead Free |
| Packaging | Tray | — |
| Primary Applications | ASIC alternative, legacy PLD integration | — |
| User I/O Pins | — | 72 |
| Core Supply Voltage | — | 4.5 V to 5.5 V |
| I/O Supply Voltage | — | 3 V to 3.6 V (dual supply) |
| Clock-to-Out | — | 5.6 ns |
| Dual-Port SRAM Access Time | — | 5 ns |
| Dual-Port SRAM | — | Up to 2.5 kbits configurable |
| Maximum Performance | — | 250 MHz |
| Process Technology | — | 0.45 um |
| Number of Logic Blocks | — | [DATA_NEEDED: number of logic blocks] |