EP1M350F780C7 vs EP1M350F780I5 तुलना
विस्तृत दोनों ओर की तुलना EP1M350F780C7 द्वारा Intel और EP1M350F780I5 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 Nrndविशेषता तुलना
| पैरामीटर | EP1M350F780C7 | EP1M350F780I5 |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | NRND |
| Family | Mercury (PLD) | — |
| Device Logic Elements | [DATA_NEEDED: exact LE count] | — |
| Logic Array Blocks (LABs) | 1440 | — |
| System Gates | 350,000 | — |
| Maximum User I/Os | 486 | — |
| पैकेज | 780-ball FineLine BGA (F780) | 780-ball FineLine BGA (F780) |
| Package Type | FINE LINE BGA-780 | — |
| Supply Voltage (Core) | 1.8 V | — |
| Logic Family | CMOS | — |
| ऑपरेटिंग तापमान | 0 C to 85 C (Commercial) | — |
| माउंटिंग प्रकार | Surface Mount | — |
| Transceivers / CDR Support | Up to 1.25 Gbps with CDR | — |
| Configuration Method | JTAG / Quartus II | — |
| RoHS स्थिति | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| MSL स्तर | [DATA_NEEDED: MSL rating] | — |
| Process Technology | CMOS SRAM-based | — |
| Device Family | — | Altera Mercury (EP1M) Enhanced Configuration Device |
| फ़ंक्शन | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| Temperature Grade (suffix "I") | — | Industrial |
| Speed Grade | — | 5 |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |