EP1S60F1020 vs EP1S60F1020C6N तुलना
विस्तृत दोनों ओर की तुलना EP1S60F1020 द्वारा Altera और EP1S60F1020C6N द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP1S60F1020 | EP1S60F1020C6N |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | अंतिम बार खरीदें | Obsolete |
| Series | Stratix | Stratix |
| Family | Altera Stratix (EP1S) | Stratix (EP1S) |
| Process Technology | 0.13 um CMOS | — |
| Logic Elements (LEs) | 57,120 | 57,120 |
| Logic Array Blocks (LABs) | 5,712 | — |
| Total RAM Bits | 5,215,104 | — |
| Embedded Multipliers (DSP Blocks) | [DATA_NEEDED: DSP block count] | — |
| User I/Os | 773 | — |
| PLLs | [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60] | — |
| पैकेज | 1020-BGA (FineLine FBGA) | — |
| Core Voltage | 1.5 V | — |
| Operating Temperature (base part) | Commercial (0C to +85C) | — |
| Speed Grade (base part) | [DATA_NEEDED: trailing suffix needed for explicit grade] | — |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL स्तर | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| RoHS स्थिति | [DATA_NEEDED: verify per part suffix] | Compliant (per 'N' suffix) |
| I/O Standard Support | LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X | — |
| Configuration Memory | SRAM-based, requires external configuration device | — |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| ऑपरेटिंग तापमान | — | 0°C to +85°C (Commercial) |
| सप्लाई वोल्टेज | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Speed Grade | — | C6 (mid-tier) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |