EP20K1000CF33C9ES vs EP20K1000CF33C8ES तुलना
विस्तृत दोनों ओर की तुलना EP20K1000CF33C9ES द्वारा Altera और EP20K1000CF33C8ES द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Altera
EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA
EP20K1000CF33C9ES ⚠ अंतिम खरीदविशेषता तुलना
| पैरामीटर | EP20K1000CF33C9ES | EP20K1000CF33C8ES |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | अंतिम बार खरीदें | Obsolete |
| Family | APEX-20KC | APEX (Advanced Programmable Embedded Matrix) |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gate Count | 1,000,000 system gates | — |
| Logic Elements | 38,400 | — |
| Logic Array Blocks (LABs) | 3,840 | — |
| Embedded System Blocks (ESBs) | 212 | Dual-port RAM / ROM / CAM |
| Total Embedded RAM Bits | 327,680 bits | — |
| Maximum User I/O Pins | 708 | — |
| पैकेज | 1,020-ball FineLine BGA (FBGA) | 1020-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Speed Grade | C9 | C8 (Commercial) |
| ऑपरेटिंग तापमान | 0 C to +85 C (commercial) | 0 °C to +85 °C (Commercial) |
| Process Technology | 0.18 um CMOS | 0.15 µm CMOS |
| Logic Element Architecture | 4-input LUT with dedicated carry chain | — |
| Maximum Embedded RAM per ESB | 32,768 bits (dual-port, FIFO support) | — |
| Phase-Locked Loops | Up to 4 enhanced PLLs | — |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5.0V | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Configuration Method | Passive serial / Passive parallel / JTAG | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | unknown |
| Series | — | APEX 20KC |
| System Gates | — | 1,000,000 |
| Logic Elements / Cells | — | 38,400 |
| Embedded Memory Bits | — | 327,680 |
| Maximum User I/O | — | 708 |
| माउंटिंग प्रकार | — | Surface Mount (BGA) |
| Core Supply Voltage | — | 1.8 V |
| Maximum Toggle Frequency | — | 301.21 MHz |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Number of PLLs | — | 4 |
| Programming Interface | — | JTAG (IEEE 1149.1) - serial via Altera Quartus |