EP20K100FC324-3 vs EP20K100EFC324-1N तुलना
विस्तृत दोनों ओर की तुलना EP20K100FC324-3 द्वारा Intel और EP20K100EFC324-1N द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K100FC324-3 | EP20K100EFC324-1N |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Series | APEX 20K | — |
| Family | APEX 20K (non-KE) | APEX-20KE |
| System Gates | 100,000 | — |
| Logic Elements | 4,160 | — |
| Maximum Logic Blocks | 26 | — |
| Embedded Memory (RAM bits) | 53,248 | — |
| User I/O Pins | 252 | — |
| Total RAM bits | 53,248 | — |
| Process Technology | 0.22 µm CMOS | 0.15 µm all-layer copper CMOS |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 167 MHz | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Speed Grade | -3 (slowest) | — |
| पैकेज | 324-pin FBGA (Fine-pitch BGA) | 324-BGA (FineLine BGA) |
| Package Body Size | 45 x 45 mm | — |
| Ball Pitch | 1.27 mm | — |
| ऑपरेटिंग तापमान | 0 °C to 85 °C (Commercial) | 0 C to 85 C |
| Programming Interface | IEEE 1149.1 JTAG | — |
| माउंटिंग प्रकार | Surface Mount | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |