EP20K400EBC652-2 vs EP20K400FC784-2 तुलना
विस्तृत दोनों ओर की तुलना EP20K400EBC652-2 द्वारा Intel और EP20K400FC784-2 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP20K400EBC652-2 - APEX-20KE 400K Gates FPGA, 488 I/O | Intel / Altera
EP20K400EBC652-2 Obsolete
विशेषता तुलना
| पैरामीटर | EP20K400EBC652-2 | EP20K400FC784-2 |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX 20K |
| Logic Elements / Macros | 1664 macros | — |
| Total Gates | 400,000 gates | — |
| User I/Os | 488 | — |
| Total RAM Bits | 212,992 bits | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Propagation Delay | 2.5 ns | — |
| ऑपरेटिंग तापमान | 0C to 85C | [DATA_NEEDED: exact Tj range] |
| पैकेज | 652-BGA (45x45 mm) | 784-Ball FineLine BGA (FC) |
| Ball Count | 652 | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Logic Family | CMOS | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount (BGA) |
| RoHS स्थिति | [DATA_NEEDED: rohs status from datasheet] | [DATA_NEEDED: not confirmed in provided data] |
| Device Family Member | — | EP20K400C |
| Typical System Gates | — | 400,000 |
| Maximum User I/O Pins | — | 488 (784-BGA) |
| Logic Elements | — | 16,640 |
| Embedded RAM (ESB) | — | 212 Kbits |
| Maximum Block RAM | — | [DATA_NEEDED: block RAM organization per ESB] |
| Maximum Frequency (internal) | — | [DATA_NEEDED: fmax, datasheet-dependent] |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Core Voltage | — | 2.5 V |
| MultiVolt I/O Voltage | — | 1.8 V / 2.5 V / 3.3 V |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT |
| Configuration Mode | — | Serial / Parallel SRAM-volatile (external PROM required) |
| Speed Grade | — | -2 (industrial) |
| MSL स्तर | — | 3 (per Partstack listing) |
| Peak Reflow Temperature | — | 220 °C (per Partstack listing) |
| Hot Socketing | — | Supported |
| JTAG / Boundary-Scan | — | IEEE 1149.1 compliant |