EP20K400FC784-2 vs EP20K400CFC672-9 तुलना
विस्तृत दोनों ओर की तुलना EP20K400FC784-2 द्वारा Altera और EP20K400CFC672-9 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K400FC784-2 | EP20K400CFC672-9 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Family | APEX 20K | APEX-20KC |
| Device Family Member | EP20K400C | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O Pins | 488 (784-BGA) | — |
| Logic Elements | 16,640 | — |
| Embedded RAM (ESB) | 212 Kbits | — |
| Maximum Block RAM | [DATA_NEEDED: block RAM organization per ESB] | — |
| Maximum Frequency (internal) | [DATA_NEEDED: fmax, datasheet-dependent] | — |
| Process Technology | 0.22 µm CMOS SRAM | — |
| Core Voltage | 2.5 V | — |
| MultiVolt I/O Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT | — |
| Configuration Mode | Serial / Parallel SRAM-volatile (external PROM required) | — |
| पैकेज | 784-Ball FineLine BGA (FC) | 672-ball FineLine BGA (FCBGA) |
| Speed Grade | -2 (industrial) | -9 (commercial, slowest bin) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: exact Tj range] | — |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL स्तर | 3 (per Partstack listing) | — |
| Peak Reflow Temperature | 220 °C (per Partstack listing) | — |
| Hot Socketing | Supported | — |
| JTAG / Boundary-Scan | IEEE 1149.1 compliant | — |
| RoHS स्थिति | [DATA_NEEDED: not confirmed in provided data] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Macrocells | — | 1664 |
| Typical Gate Count | — | 400,000 gates |
| Embedded Memory (ESB) | — | 212,992 bits |
| User I/O Count | — | 488 |
| PLLs | — | 4 |
| Core Supply Voltage | — | 1.71 V to 1.89 V |
| I/O Supply Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (TJ) | — | 0 °C to 85 °C |
| Package Body Size | — | 27 mm × 27 mm |
| Configuration Method | — | EPC serial device or JTAG |
| Process Node | — | [DATA_NEEDED: process node] |