EP2A40F1020C7ES vs EP2A40F1020C9ES तुलना
विस्तृत दोनों ओर की तुलना EP2A40F1020C7ES द्वारा Intel और EP2A40F1020C9ES द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES Obsoleteविशेषता तुलना
| पैरामीटर | EP2A40F1020C7ES | EP2A40F1020C9ES |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| Typical Gates | 1,500,000 | — |
| Embedded Memory | 655,360 bits | Embedded System Blocks (ESBs) - RAM/ROM |
| Maximum User I/O | 735 | — |
| Maximum Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| Core Voltage | 1.5 V | — |
| पैकेज | 1020-pin FC-FBGA | 1020-pin FC-FBGA |
| Speed Grade | C7 (with ES enhanced speed suffix) | — |
| High-Speed Interface | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: commercial/industrial grade] | [DATA_NEEDED: operating temperature grade] |
| I/O Standards | LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V | LVDS and other high-speed standards (per family datasheet) |
| PLLs | Up to 8 (per datasheet family feature) | — |
| RoHS स्थिति | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG (IEEE 1149.1), passive serial | — |
| माउंटिंग प्रकार | Surface Mount (FC-FBGA) | Surface Mount |
| System Gates | — | 1.5 M |
| Logic Cells / Elements | — | 38,400 |
| Maximum Internal Clock Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | Flip-Chip Fine-Pitch Ball Grid Array |
| RAM Support | — | Synchronous and asynchronous |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |