EP2A40F1020C7ES vs EP2A40F1020C9ES Perbandingan
Perbandingan bersamaan detil EP2A40F1020C7ES dari Intel dan EP2A40F1020C9ES dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES ObsoletePerbandingan Spesifikasi
| Parameter Umum | EP2A40F1020C7ES | EP2A40F1020C9ES |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| Typical Gates | 1,500,000 | — |
| Embedded Memory | 655,360 bits | Embedded System Blocks (ESBs) - RAM/ROM |
| Maximum User I/O | 735 | — |
| Maximum Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| Core Voltage | 1.5 V | — |
| Paket | 1020-pin FC-FBGA | 1020-pin FC-FBGA |
| Speed Grade | C7 (with ES enhanced speed suffix) | — |
| High-Speed Interface | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| Suhu Kerja | [DATA_NEEDED: commercial/industrial grade] | [DATA_NEEDED: operating temperature grade] |
| I/O Standards | LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V | LVDS and other high-speed standards (per family datasheet) |
| PLLs | Up to 8 (per datasheet family feature) | — |
| Status RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG (IEEE 1149.1), passive serial | — |
| Tipe Mounting | Surface Mount (FC-FBGA) | Surface Mount |
| System Gates | — | 1.5 M |
| Logic Cells / Elements | — | 38,400 |
| Maximum Internal Clock Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | Flip-Chip Fine-Pitch Ball Grid Array |
| RAM Support | — | Synchronous and asynchronous |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |