EP3SL50F484I4LG vs EP3SL50F484I4L तुलना
विस्तृत दोनों ओर की तुलना EP3SL50F484I4LG द्वारा Intel और EP3SL50F484I4L द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG Nrndविशेषता तुलना
| पैरामीटर | EP3SL50F484I4LG | EP3SL50F484I4L |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | NRND |
| Family | Stratix III L | Stratix III |
| Series | EP3SL50 | Stratix III L (Low Power) |
| Logic Elements | 47,500 | — |
| Embedded Memory | 2,184,192 bits (273 KB) | — |
| User I/Os | 296 | — |
| पैकेज | 484-Ball FCBGA (FBGA) | 484-ball FBGA (FCBGA) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | -40C to +100C (Industrial) | 0 °C to 85 °C (commercial, per DigiKey listing) |
| Speed Grade | I4 (fast) | 4 |
| सप्लाई वोल्टेज | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) | 0.9 V core (family-typical) |
| Process Node | 40 nm | — |
| RoHS स्थिति | Compliant | — |
| Lead-Free | Yes | — |
| Total I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Family supports up to 384 18x18 multipliers (family-level) |
| Transceivers | [DATA_NEEDED: transceiver channel count] | Family supports up to 4 transceivers per family datasheet |
| Configuration Memory | SRAM-based | — |
| Configuration Interface | JTAG / Passive Serial / Fast Passive Parallel | — |
| Logic Elements (LE) | — | 47,500 |
| Embedded Memory Bits | — | 2,184,192 bits (~273 KB) |
| User I/O Pins | — | 296 |
| Process Technology | — | 65 nm low-power CMOS |
| Lead-Free / RoHS | — | Yes (RoHS compliant) |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |