EP910ILC-25 vs EP910IPC-50 तुलना
विस्तृत दोनों ओर की तुलना EP910ILC-25 द्वारा Intel और EP910IPC-50 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP910ILC-25 | EP910IPC-50 |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| User I/O Pins | 36 | 24 |
| Propagation Delay (tPD) | 25 ns | 50 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM cell |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| पैकेज | 44-pin JLCC (windowed ceramic) | 40-pin Ceramic DIP (IPC, windowed) |
| माउंटिंग प्रकार | Surface Mount | Through-Hole (DIP) |
| ऑपरेटिंग तापमान | -40C to +85C (industrial) | -40C to +85C (industrial) |
| सप्लाई वोल्टेज | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| RoHS स्थिति | non_compliant (ceramic windowed package) | [DATA_NEEDED: not stated in verified data] |
| लाइफसाइकिल स्थिति | Obsolete - last time buy was late 1990s | — |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Logic Capacity | — | [DATA_NEEDED: macrocell count / equivalent gates] |
| Clock-to-Output (tCO) | — | 35 ns |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | — | Off-board EPROM programmer + UV erase |
| Erasure Method | — | UV light through ceramic window (IPC package) |