EP910ILC-25 vs EP910IPC-50 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-25 sa pamamagitan ng Intel at EP910IPC-50 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-25 | EP910IPC-50 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| User I/O Pins | 36 | 24 |
| Propagation Delay (tPD) | 25 ns | 50 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM cell |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Packhaging | 44-pin JLCC (windowed ceramic) | 40-pin Ceramic DIP (IPC, windowed) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole (DIP) |
| Temperature na Operasyon | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Volte ng Pagbibigay | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Tindminan RoHS | non_compliant (ceramic windowed package) | [DATA_NEEDED: not stated in verified data] |
| Katayuan ng Lifecycle | Obsolete - last time buy was late 1990s | — |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Logic Capacity | — | [DATA_NEEDED: macrocell count / equivalent gates] |
| Clock-to-Output (tCO) | — | 35 ns |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | — | Off-board EPROM programmer + UV erase |
| Erasure Method | — | UV light through ceramic window (IPC package) |