EP910PI-20 vs EP910JC-30 तुलना
विस्तृत दोनों ओर की तुलना EP910PI-20 द्वारा Altera और EP910JC-30 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP910PI-20 | EP910JC-30 |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Device Family | Altera Classic EPLD Family | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 20 ns | — |
| पैकेज | PDIP-40 (PI suffix) | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) |
| माउंटिंग प्रकार | Through-Hole | Surface Mount (socket-mountable) |
| Supply Voltage (VCC) | 5 V (+/- 5%) | — |
| ऑपरेटिंग तापमान | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Technology | CMOS EPROM (UV-erasable windowed variants available) | CMOS EPROM, UV-erasable |
| Configuration Method | Non-volatile EPROM (no boot PROM required) | — |
| Dedicated Inputs | 12 | — |
| Bidirectional I/O Pins | 24 | — |
| Maximum Counter Frequency | 125 MHz | — |
| Output Drive Current (IOL) | 24 mA (TTL-compatible) | — |
| Programmable Polarity | Yes (XOR gate per macrocell) | — |
| Macrocell Flip-Flop | Yes (D-type, programmable) | — |
| Power Dissipation | [DATA_NEEDED: typical power dissipation in mW] | — |
| Programming Interface | JEDEC file via Altera programming hardware | — |
| RoHS स्थिति | unknown | [DATA_NEEDED: RoHS compliance] |
| MIL-STD-883 Variant | EP910DM/883B (separate part number) | — |
| Family | — | Classic EPLD (MAX-style) |
| Propagation Delay (tpd) | — | 30 ns |
| Maximum Internal Frequency (Fmax) | — | 33.3 MHz |
| Inputs | — | 36 |
| Product Terms | — | 240 |
| Outputs | — | 10 dedicated |
| Supply Voltage (Vcc) | — | 5 V |
| Supply Current (Icc) | — | [DATA_NEEDED: Icc typical / maximum] |
| Logic Blocks | — | 24 macrocells (AND/OR array architecture) |