EPM5016PC-1 vs EPM5016DC-20 तुलना
विस्तृत दोनों ओर की तुलना EPM5016PC-1 द्वारा Altera और EPM5016DC-20 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5016PC-1 | EPM5016DC-20 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 16 | 16 |
| Usable Gates | 200 | — |
| Logic Array Blocks (LABs) | 1 | — |
| Propagation Delay (tPD) | 35 ns | 20 ns |
| Maximum Frequency (fMAX) | 62 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time ns] | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Supply Current (ICC) | 50 mA typical | — |
| ऑपरेटिंग तापमान | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| पैकेज | PDIP-20 (plastic DIP, through-hole) | — |
| पिन काउंट | 20 | — |
| Configuration Memory | CMOS EEPROM (UV-erasable) | — |
| Programming Interface | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) | — |
| RoHS स्थिति | Non-compliant (PDIP with SnPb leads, pre-RoHS era) | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | EPLD (UV-Erasable Programmable Logic Device) |
| Product Terms | — | 160 |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 8 |
| अधिकतम क्लॉक फ़्रीक्वेंसी | — | 62.5 MHz |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS, UV-erasable |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |
| Speed Grade | — | -20 = 20 ns tPD |
| Programming Method | — | UV erase + EPROM-style programming via Altera programming hardware |