EPM5192JC1 vs EPM5192GC1 तुलना
विस्तृत दोनों ओर की तुलना EPM5192JC1 द्वारा Intel और EPM5192GC1 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5192JC1 | EPM5192GC1 |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 (MAX 5xxx CPLD) | MAX 5000 |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Macro Cells | 192 | 192 |
| Usable Gates | 3750 | 3,750 |
| Maximum Operating Frequency | 62.5 MHz | 62.5 MHz |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V |
| Process Technology | 0.5 µm CMOS, UV-erasable EPROM | EPROM-based CMOS |
| Propagation Delay (typ) | [DATA_NEEDED: propagation delay in ns] | — |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| पैकेज | [DATA_NEEDED: exact package from datasheet] | — |
| माउंटिंग प्रकार | [DATA_NEEDED: surface mount or through-hole] | Through-hole (PGA) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temp range] | [DATA_NEEDED: operating temperature range] |
| Programming Interface | JTAG-compatible (Altera MAX 5xxx) | — |
| Logic Blocks (LABs) | 24 (8 macrocells per LAB) | — |
| RoHS स्थिति | unknown | unknown |
| AEC-Q100 | not_applicable | — |
| Lifecycle | Obsolete - last-time-buy stock only at franchised distributors | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| पिन की संख्या | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |