M7AFS600-FGG484I vs AFS600-1FG484I तुलना
विस्तृत दोनों ओर की तुलना M7AFS600-FGG484I द्वारा Microchip Technology और AFS600-1FG484I द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
M7AFS600-FGG484I - Fusion FPGA 600K Gates 484-BGA | Microchip
M7AFS600-FGG484I ✓ सक्रियMicrochip Technology
AFS600-1FG484I - 600K Gate Mixed-Signal FPGA | Microchip
AFS600-1FG484I ✓ सक्रियविशेषता तुलना
| पैरामीटर | M7AFS600-FGG484I | AFS600-1FG484I |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Programmable Logic Family | Fusion (Microsemi/Actel, now Microchip) | — |
| System Gates | 600000 gates | 600,000 gates |
| Embedded Processor | ARM CoreMP7 (ARM7TDMI-compatible) | — |
| User I/O | 172 I/O | 172 I/O |
| Configuration Technology | Flash-based, on-chip | — |
| Core Supply Voltage | 1.5 V | — |
| पैकेज | 484-BGA (FGG484), 1.0 mm ball pitch | 484-BGA |
| माउंटिंग प्रकार | Surface Mount | — |
| ऑपरेटिंग तापमान | -40C to +100C (industrial, I grade) | -55°C to 100°C |
| Memory - Listable Resource | 110592 (per DigiKey listing) | — |
| Maximum Operating Frequency | [DATA_NEEDED: maximum operating frequency] | — |
| I/O Bank Count | [DATA_NEEDED: I/O bank count] | — |
| Embedded Flash Blocks | [DATA_NEEDED: embedded flash block count] | — |
| Analog Peripherals | [DATA_NEEDED: analog peripheral configuration] | — |
| MSL स्तर | [DATA_NEEDED: moisture sensitivity level] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Tool Chain | Microchip Libero SoC (formerly Actel Libero) | — |
| Device Type | — | Fusion mixed-signal FPGA |
| Logic Cells | — | 13,824 cells |
| Embedded Flash | — | 110,592 bits |
| Nominal Supply Voltage | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| Process Technology | — | 130 nm CMOS |
| Metal Layers | — | 7 layers |
| Configuration Memory | — | Flash-based |
| Package Ball Count | — | 484 balls |
| Logic Family | — | CMOS |
| Clock Generation | — | Comprehensive clock generation and management circuitry |
| Mixed-Signal Features | — | Configurable analog resources |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |