M7AFS600-FGG484I vs AFS600-FGG484 तुलना
विस्तृत दोनों ओर की तुलना M7AFS600-FGG484I द्वारा Microchip Technology और AFS600-FGG484 द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
M7AFS600-FGG484I - Fusion FPGA 600K Gates 484-BGA | Microchip
M7AFS600-FGG484I ✓ सक्रियविशेषता तुलना
| पैरामीटर | M7AFS600-FGG484I | AFS600-FGG484 |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Programmable Logic Family | Fusion (Microsemi/Actel, now Microchip) | — |
| System Gates | 600000 gates | 600000 gates |
| Embedded Processor | ARM CoreMP7 (ARM7TDMI-compatible) | — |
| User I/O | 172 I/O | — |
| Configuration Technology | Flash-based, on-chip | — |
| Core Supply Voltage | 1.5 V | — |
| पैकेज | 484-BGA (FGG484), 1.0 mm ball pitch | 484-pin FBGA; one verified source alternatively labels BGA-256 |
| माउंटिंग प्रकार | Surface Mount | Surface mount |
| ऑपरेटिंग तापमान | -40C to +100C (industrial, I grade) | 0 C to 70 C |
| Memory - Listable Resource | 110592 (per DigiKey listing) | — |
| Maximum Operating Frequency | [DATA_NEEDED: maximum operating frequency] | — |
| I/O Bank Count | [DATA_NEEDED: I/O bank count] | — |
| Embedded Flash Blocks | [DATA_NEEDED: embedded flash block count] | — |
| Analog Peripherals | [DATA_NEEDED: analog peripheral configuration] | — |
| MSL स्तर | [DATA_NEEDED: moisture sensitivity level] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | — |
| Programming Tool Chain | Microchip Libero SoC (formerly Actel Libero) | — |
| Device Type | — | Fusion mixed-signal FPGA |
| Maximum Frequency | — | 1098.9 MHz |
| Technology | — | 130 nm |
| Metal Layers | — | 7 layers |
| Process | — | Flash-based CMOS |
| सप्लाई वोल्टेज | — | 1.5 V |
| I/O Count | — | 172 I/O |
| Configuration Retention | — | Nonvolatile flash |
| Power-Up Feature | — | Live at Power-Up (LAPU) |
| Architecture | — | Monolithic mixed-signal FPGA |
| Programmable Logic | — | High-performance flash-based programmable logic |
| Analog Resources | — | Configurable analog resources |
| Flash Memory | — | Large flash-memory blocks |
| Clocking | — | Comprehensive clock generation and management circuitry |
| Processor Support | — | Optional ARM support |
| लाइफसाइकिल स्थिति | — | [DATA_NEEDED: current lifecycle status] |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | — | [DATA_NEEDED: REACH compliance status] |