RTAX2000SL-CGS624B vs RTAX2000S-CG624PROTO तुलना
विस्तृत दोनों ओर की तुलना RTAX2000SL-CGS624B द्वारा Microchip Technology और RTAX2000S-CG624PROTO द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip
RTAX2000SL-CGS624B ✓ सक्रियMicrochip Technology
RTAX2000S-CG624PROTO - 2M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX2000S-CG624PROTO ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX2000SL-CGS624B | RTAX2000S-CG624PROTO |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S Radiation-Tolerant FPGA |
| Logic Blocks (CLBs) | 21504 | — |
| Equivalent System Gates | 2000000 | — |
| ASIC Gates | 250000 | — |
| अधिकतम क्लॉक फ़्रीक्वेंसी | 350 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| सप्लाई वोल्टेज | 1.5 V | [DATA_NEEDED: core and I/O supply voltage] |
| Programming Technology | Anti-fuse (one-time programmable) | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | Embedded SRAM blocks (FIFO / dual-port capable) |
| पैकेज | 624-pin Ceramic Column Grid Array (CCGA) | CCGA-624 (ceramic column grid array, 624 balls) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Number of I/Os | [DATA_NEEDED: user I/O count] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Qualification | QML per Mil Prf 38535 family (DLA cross-reference qualified program) | — |
| System Gates | — | 2,000,000 |
| Logic Cells (R-cells) | — | 21,504 |
| D-Flip-Flops (Registers) | — | 32,256 |
| Logic Architecture | — | CMOS antifuse (OTP), SEU-hardened |
| Logic Family | — | CMOS |
| Configuration | — | Live at power-up (non-volatile antifuse) |
| SEU Immunity | — | SEU rate < 10^-10 errors/bit-day (per family datasheet) |
| Prototyping Variant | — | Yes (PROTO suffix) |
| I/O Standards | — | Single-ended and differential (P/N pin pairs) |
| Design Software | — | Microsemi/Microchip Libero SoC |
| Total Ionizing Dose (TID) | — | [DATA_NEEDED: TID rating in krad(Si)] |
| Maximum I/O Count (624-ball pkg) | — | [DATA_NEEDED: user I/O count] |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |