XC3090L-7TQG176C vs XC3090L-6TQG176I तुलना
विस्तृत दोनों ओर की तुलना XC3090L-7TQG176C द्वारा Xilinx और XC3090L-6TQG176I द्वारा Xilinx. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | XC3090L-7TQG176C | XC3090L-6TQG176I |
|---|---|---|
| ब्रांड | Xilinx | Xilinx |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | XC3000L | XC3000L Low Voltage Logic Cell Array |
| Device | XC3090L | — |
| Logic Cells / CLBs | 100 CLBs (320 F-FFs) | — |
| Usable Gates | 5,000 (typical, up to 9,000 peak) | 900 |
| User I/O Count | 144 (maximum, TQG176) | — |
| Configuration Memory | SRAM (volatile, requires external PROM) | SRAM (volatile, requires external configuration PROM) |
| Process Technology | 0.8 micron CMOS | CMOS, 5 V tolerant I/O on selected variants |
| Supply Voltage (Core) | 3.0 V to 3.6 V | — |
| Supply Voltage (I/O VCCO) | 3.0 V to 3.6 V | — |
| Logic Cell Toggle Delay | approximately 1.3 to 1.5 ns (-7 speed grade) | — |
| ऑपरेटिंग तापमान रेंज | 0C to +85C (C suffix, commercial) | — |
| पैकेज | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount | TQG176 (176-pin Thin Quad Flat Pack) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Configuration Mode | Serial (master/slave) and JTAG (IEEE 1149.1) | — |
| MSL स्तर | 3 (168 hours) [DATA_NEEDED: confirm per package marking] | — |
| RoHS स्थिति | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Lead Content | [DATA_NEEDED] | — |
| Configuration Clock Source | Internal oscillator amplifier or external pin | — |
| Output Drive (per I/O) | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) | — |
| Product Type | — | SRAM-based FPGA |
| Logic Cells (CLBs) | — | [DATA_NEEDED: CLB count] |
| Speed Grade | — | -6 (approximately 6 ns combinatorial delay) |
| Supply Voltage (VCC) | — | 3.3 V |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Configuration Modes | — | 5 (Master Serial, Slave Serial, Master Parallel, Slave Parallel, Peripheral) |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Readback | — | Supported |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |