XC3090L-7TQG176C vs XC3090L-6TQG176I موازنہ
تفصیلی ساتھ ساتھ موازنہ از XC3090L-7TQG176C بذریعہ Xilinx اور XC3090L-6TQG176I بذریعہ Xilinx. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
خصوصیات کا موازنہ
| پیرامیٹر | XC3090L-7TQG176C | XC3090L-6TQG176I |
|---|---|---|
| برانڈ | Xilinx | Xilinx |
| زمرہ | FPGA & CPLD | FPGA & CPLD |
| لائف سائیکل کی حالت | Obsolete | Obsolete |
| Family | XC3000L | XC3000L Low Voltage Logic Cell Array |
| Device | XC3090L | — |
| Logic Cells / CLBs | 100 CLBs (320 F-FFs) | — |
| Usable Gates | 5,000 (typical, up to 9,000 peak) | 900 |
| User I/O Count | 144 (maximum, TQG176) | — |
| Configuration Memory | SRAM (volatile, requires external PROM) | SRAM (volatile, requires external configuration PROM) |
| Process Technology | 0.8 micron CMOS | CMOS, 5 V tolerant I/O on selected variants |
| Supply Voltage (Core) | 3.0 V to 3.6 V | — |
| Supply Voltage (I/O VCCO) | 3.0 V to 3.6 V | — |
| Logic Cell Toggle Delay | approximately 1.3 to 1.5 ns (-7 speed grade) | — |
| آپریٹنگ درجہ حرارت رینج | 0C to +85C (C suffix, commercial) | — |
| پیکیج | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount | TQG176 (176-pin Thin Quad Flat Pack) |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface Mount |
| Configuration Mode | Serial (master/slave) and JTAG (IEEE 1149.1) | — |
| MSL لیول | 3 (168 hours) [DATA_NEEDED: confirm per package marking] | — |
| RoHS اسٹیٹس | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Lead Content | [DATA_NEEDED] | — |
| Configuration Clock Source | Internal oscillator amplifier or external pin | — |
| Output Drive (per I/O) | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) | — |
| Product Type | — | SRAM-based FPGA |
| Logic Cells (CLBs) | — | [DATA_NEEDED: CLB count] |
| Speed Grade | — | -6 (approximately 6 ns combinatorial delay) |
| Supply Voltage (VCC) | — | 3.3 V |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Configuration Modes | — | 5 (Master Serial, Slave Serial, Master Parallel, Slave Parallel, Peripheral) |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Readback | — | Supported |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |