EP1810LC-20 vs EP1810LC-20T Perbandingan
Perbandingan bersamaan detil EP1810LC-20 dari Intel dan EP1810LC-20T dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP1810LC-20 | EP1810LC-20T |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 900 | 900 gates |
| Macrocells | 48 | 48 |
| Maximum Operating Frequency | 50 MHz | — |
| Propagation Delay (tPD) | 20 ns | — |
| Tegangan Pemuat | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | — |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | — |
| Paket | 68-pin PLCC | — |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | — |
| Suhu Kerja | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Tipe Mounting | Surface Mount | Surface Mount (socket-compatible) |
| Status RoHS | [DATA_NEEDED: rohs status] | Non-compliant (legacy 5V PLCC) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 4 x 12 macrocells |
| Maximum Toggle Frequency | — | 50 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5 V |
| Package Type | — | PLCC-68 (J-lead) |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| Programming Interface | — | JTAG (IEEE 1149.1) and Altera Master/Slave serial |
| Shipping Format | — | Tape & Reel ("T" suffix) |