EP1810LC-35 vs EP1810LC-30 Perbandingan

Perbandingan bersamaan detil EP1810LC-35 dari Rochester Electronics dan EP1810LC-30 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Rochester Electronics
EP1810LC-35 EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera

EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera

EP1810LC-35 ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EP1810LC-35 EP1810LC-30
Merek Rochester Electronics Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Waktu Pembelian Terakhir Obsolete
Device Type EPLD (Erasable Programmable Logic Device) —
Series Classic EP1810 —
Macrocells 48 48
Equivalent Gates 900 usable / 2100 equivalent —
Maximum Operating Frequency 28.6 MHz —
Propagation Delay (tpd) 35 ns (max, '-35' speed grade) —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Technology CMOS, UV-erasable EPROM CMOS, low-power (LC)
Paket 68-pin PLCC (J-Lead) JLCC-68 (68-pin J-Lead ceramic chip carrier)
Tipe Mounting Surface Mount (socketable) —
Suhu Kerja 0C to +70C (commercial) [DATA_NEEDED: temperature grade]
I/O Pins [DATA_NEEDED: I/O count exact] —
Configuration Method UV-erase + EPROM programmer —
Programmable Interconnect Centralized Programmable Interconnect Array (PIA) —
Development Tool (legacy) MAX+PLUS II / A+PLUS —
Status RoHS [DATA_NEEDED] unknown (legacy ceramic package)
Lead-Free [DATA_NEEDED] —
Product Type — Classic EPLD (Erasable Programmable Logic Device)
Family — Altera Classic EPLD
Flip-Flops — 48 (one per macrocell)
Speed Grade (tPD) — 30 ns
Tegangan Pemuat — 5 V (typical)
Programming — Device programmer or JTAG
Standby Current — [DATA_NEEDED: ICC standby]
Jumlah Pin — 68
Number of I/O Pins — [DATA_NEEDED: I/O count]
Logic Blocks — 48 macrocells

Spek dan Sumber

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