EP20K400GI655-1 vs EP20K400GI655-2 Perbandingan

Perbandingan bersamaan detil EP20K400GI655-1 dari Altera dan EP20K400GI655-2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP20K400GI655-1 EP20K400GI655-2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20K —
Device Series EP20K400 —
Technology CMOS, SRAM-based CMOS SRAM
Logic Elements 16640 —
Typical Gates 400000 —
Maximum User I/O 502 496
Dedicated Inputs 4 6
Total Terminals 655 —
Propagation Delay 2.5 ns 3.1 ns (typical)
Package Type Ceramic Pin Grid Array (CPGA-655) —
JESD-30 Package Code S-CPGA-P655 —
Suhu Kerja -40C to +85C (Industrial) -40C to +85C (industrial)
Moisture Sensitivity Level MSL 1 1 (per Altera family)
Peak Reflow Temperature 220 C —
Programmability In-system, JTAG boundary-scan (IEEE 1149.1) —
Process Node 0.18 micrometer CMOS —
Status RoHS Compliant [DATA_NEEDED: RoHS status]
Manufacturer — Altera Corporation
Series — APEX 20K (EP20K400)
Device Type — Field Programmable Gate Array (FPGA)
Typical Gate Count — 400,000 gates
Logic Elements (LE) — 16,640
Number of Terminals — 655
Paket — SPGA-655 (47 mm x 47 mm)
Nominal Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
Tipe Mounting — Through-Hole / Socket
Configuration Method — JTAG, Passive Serial, Passive Parallel
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+
Embedded Memory — Embedded System Blocks (ESBs)
Status Lingkungan Hidup — Obsolete (legacy Altera APEX 20K family)

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