EP4CGX150DF31I7NAD vs EP4CGX110DF31I7 Perbandingan
Perbandingan bersamaan detil EP4CGX150DF31I7NAD dari Altera dan EP4CGX110DF31I7 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP4CGX150DF31I7NAD - Cyclone IV GX FPGA 149K LEs | Altera | 896-BGA
EP4CGX150DF31I7NAD ✓ Aktif
Perbandingan Spesifikasi
| Parameter Umum | EP4CGX150DF31I7NAD | EP4CGX110DF31I7 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | Cyclone IV GX | — |
| Logic Elements | 149,760 | — |
| Logic Array Blocks (LABs) | 9,360 CLBs | — |
| Embedded Memory Bits | 6,635,520 bits | — |
| Embedded Memory Blocks (M9K) | 720 | — |
| Embedded 18x18 Multipliers | 720 | — |
| Transceiver Channels | 8 (up to 3.125 Gbps) | — |
| PCI Express Hard IP Blocks | 2 | — |
| Maximum User I/O Pins | 475 | — |
| Paket | 896-ball FineLine BGA (FBGA-896), 31 mm, 1.0 mm pitch | 896-BGA (FBGA-896), 31 mm |
| Speed Grade | 7 (industrial, -40C to +100C junction) | -7 |
| Suhu Hubung Kerja | -40C to +100C | — |
| Core Voltage VCCINT | 1.0 V or 1.2 V (transceiver-dependent) | — |
| PLL Analog Voltage VCCA | 2.5 V | — |
| I/O Bank Voltage VCCIO | 1.2 V to 3.3 V (banked) | — |
| Configuration Modes | AS, PS, FPP, JTAG | — |
| Bitstream Encryption | AES-256 | — |
| Status RoHS | Compliant (Pb-free) | Compliant |
| Ordering Code Suffix | AD (Pb-free tray) | — |
| Series | — | Cyclone IV GX |
| Device Logic Elements | — | 109,424 |
| Total Memory Bits | — | 5,621,760 |
| Number of Logic Array Blocks (LABs) | — | Not specified in provided data [DATA_NEEDED: LAB count] |
| Number of I/O | — | 475 user I/O |
| Multipliers (18x18) | — | 432 |
| PLLs | — | 4 |
| Transceivers | — | 8 (up to 3.125 Gbps) |
| M9K Memory Blocks | — | 270 |
| Ball Pitch | — | 0.8 mm |
| Temperature Grade | — | Industrial (-40C to +100C Tj) |
| Core Voltage | — | 1.2 V typical |
| Configuration Method | — | SRAM (EPCS or JTAG) |
| Tipe Mounting | — | Surface Mount |
| Level MSL | — | 3 (per JEDEC J-STD-020) [DATA_NEEDED: floor life days] |