EP610LI-35 vs EP910LC-35 Perbandingan

Perbandingan bersamaan detil EP610LI-35 dari Altera dan EP910LC-35 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610LI-35 EP910LC-35
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD Classic (EP910)
Series EP610 —
Number of Macrocells 16 —
Usable Gates 300 450
Number of I/O Pins 16 —
Total Inputs 20 —
Dedicated Inputs 4 —
External Clock Inputs 2 —
Product Terms 160 —
Maximum Propagation Delay 35 ns (tpd) —
Maximum Operating Frequency 28.6 MHz (fmax) —
Pipelined Data Rate Up to 100 MHz —
Tegangan Pemuat 5 V —
Process Technology CMOS —
Architecture PAL-type (AND-OR array) —
Paket 28-pin PLCC (windowed ceramic, 'LI') PLCC-44 (J-lead, LC suffix)
Rentang Suhu Kerja [DATA_NEEDED: military/industrial operating temperature range] —
Programming Technology UV-erasable (EPROM) —
Tipe Mounting Surface Mount —
Status RoHS [DATA_NEEDED: RoHS compliance status] Not applicable (legacy product)
Product Type — EPLD (Erasable Programmable Logic Device)
Macrocells — 24
Propagation Delay (tPD) — 35 ns
Maximum Toggle Frequency — 28.6 MHz
Supply Voltage (VCC) — 5 V
Technology — CMOS EPROM
Suhu Kerja — 0C to +70C (commercial)
Jumlah Pin — 44
Programmable Flip-Flops — Yes (per macrocell)
Output Enable Control — Per macrocell
Erasure Method — UV (windowed) or OTP (plastic)

Spek dan Sumber

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