EP610LI-35 vs EP910LC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LI-35 sa pamamagitan ng Altera at EP910LC-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610LI-35 | EP910LC-35 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Classic EPLD | Classic (EP910) |
| Series | EP610 | — |
| Number of Macrocells | 16 | — |
| Usable Gates | 300 | 450 |
| Number of I/O Pins | 16 | — |
| Total Inputs | 20 | — |
| Dedicated Inputs | 4 | — |
| External Clock Inputs | 2 | — |
| Product Terms | 160 | — |
| Maximum Propagation Delay | 35 ns (tpd) | — |
| Maximum Operating Frequency | 28.6 MHz (fmax) | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Volte ng Pagbibigay | 5 V | — |
| Process Technology | CMOS | — |
| Architecture | PAL-type (AND-OR array) | — |
| Packhaging | 28-pin PLCC (windowed ceramic, 'LI') | PLCC-44 (J-lead, LC suffix) |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: military/industrial operating temperature range] | — |
| Programming Technology | UV-erasable (EPROM) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Not applicable (legacy product) |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Bilang ng Pin | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |