EP610PC30 vs EP610PC-15 Perbandingan

Perbandingan bersamaan detil EP610PC30 dari Altera dan EP610PC-15 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610PC30 EP610PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Device Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Family Classic EP610 Classic EPLD
Macrocells 16 16
Usable Gates 300 300 gates
Propagation Delay (tPD) 30 ns —
Maximum Toggle Frequency 33.3 MHz —
Pipelined Data Rate Up to 100 MHz Up to 100 MHz
Supply Voltage (VCC) 5 V 5 V (single supply)
Technology CMOS CMOS
Paket PDIP-24 PDIP-24 (plastic DIP, 24-pin)
Tipe Mounting Through-Hole Through-Hole (DIP)
Programming EPROM/EEPROM-based, MAX+plus II toolchain —
Suhu Kerja [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Status RoHS Not applicable (legacy through-hole, contains Pb per historical datasheet) [DATA_NEEDED: RoHS status]
Logic Capacity 16 macrocells / 300 gates equivalent —
Configuration Memory Non-volatile (UV-erasable or OTP variant) —
Manufacturer (Original) Altera Corporation (now Intel FPGA) —
Current Distributor Rochester Electronics, LLC —
Logic Delay (tPD) — 15 ns (pin-to-pin, -15 speed grade)
Maximum Counter Frequency — 100 MHz (per family datasheet)
Architecture — PAL-type, sum-of-products AND/OR array
TTL Emulation — 100% TTL compatible
Jumlah Pin — 24 pins
Development Tool — Altera MAX+PLUS II
Logic Test Circuitry — On-board for AC/DC verification

Spek dan Sumber

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