EP610PC30 vs EP610PC-15 比較
詳細な並列比較: EP610PC30 メーカー: Altera および EP610PC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC30 | EP610PC-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $42.00 | $17.50 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Classic EP610 | Classic EPLD |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 gates |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Toggle Frequency | 33.3 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Technology | CMOS | CMOS |
| パッケージ | PDIP-24 | PDIP-24 (plastic DIP, 24-pin) |
| 実装タイプ | Through-Hole | Through-Hole (DIP) |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS ステータス | Not applicable (legacy through-hole, contains Pb per historical datasheet) | [DATA_NEEDED: RoHS status] |
| Logic Capacity | 16 macrocells / 300 gates equivalent | — |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | — |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | — |
| Current Distributor | Rochester Electronics, LLC | — |
| Logic Delay (tPD) | — | 15 ns (pin-to-pin, -15 speed grade) |
| Maximum Counter Frequency | — | 100 MHz (per family datasheet) |
| Architecture | — | PAL-type, sum-of-products AND/OR array |
| TTL Emulation | — | 100% TTL compatible |
| ピン数 | — | 24 pins |
| Development Tool | — | Altera MAX+PLUS II |
| Logic Test Circuitry | — | On-board for AC/DC verification |