EP910DI-35 vs EP910ILC-15 Perbandingan
Perbandingan bersamaan detil EP910DI-35 dari Altera dan EP910ILC-15 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP910DI-35 | EP910ILC-15 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | NRND |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 15 ns |
| Maximum Toggle Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Supply Current (ICC) | 40 mA typical | — |
| Dedicated Inputs | 10 | — |
| Bidirectional I/O Pins | 20 | — |
| Total Pins | 40 | — |
| Paket | CDIP-40 (Ceramic DIP with UV window) | 44-pin PLCC (J-lead) |
| Tipe Mounting | Through-Hole | Surface Mount (SMT) |
| Suhu Kerja | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Technology | CMOS, UV-erasable EPROM | — |
| Programming Method | EPROM programmer + JEDEC fuse map | — |
| Erasure Method | UV light through quartz window | — |
| Status RoHS | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] | [DATA_NEEDED: RoHS compliance status] |
| Logic Family | PAL-type AND/OR array with D flip-flops | — |
| Manufacturer | Original Altera; long-term authorized by Rochester Electronics, LLC | — |
| Series | — | EP910 |
| Logic Gates | — | 450 |
| User I/O Pins | — | 36 |
| Maximum Operating Frequency | — | 83.33 MHz |
| Tegangan Pemuat | — | 5 V |
| Tipe Memori | — | EPROM (UV-erasable) |
| Propagation Class | — | -15 speed grade |
| Storage Condition | — | Dry cabinet, humidity-controlled |