EP910LC44-30T vs EP910LC44 Perbandingan

Perbandingan bersamaan detil EP910LC44-30T dari Altera dan EP910LC44 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910LC44-30T EP910LC44
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Waktu Pembelian Terakhir
Device Family Classic EPLD —
Logic Type PAL-type CMOS EPLD (OT PLD) —
Macrocells 24 24
Product Terms 240 —
Propagation Delay (tPD) 33 ns —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) 4.75 V to 5.25 V (5 V nominal)
Dedicated Inputs 12 12
I/O Lines 24 (bidirectional) —
Total Inputs 36 —
Total Outputs 24 —
External Clock Inputs 2 —
Programming Technology CMOS, UV-erasable (windowed package in family) —
Security Bit Programmable (logic readback protection) —
Operating Temperature Grade Commercial —
Paket PQCC-44 (Plastic Leaded Chip Carrier, J-bend) 44-pin PLCC (J-leaded)
Terminal Form J-BEND —
Package Code QCCJ —
Tipe Mounting Surface Mount —
Product Family — Classic EPLD (EP910 Series)
Manufacturer — Altera Corporation (now Intel PSG)
Device Type — Erasable Programmable Logic Device (EPLD)
Total Product Terms — 240
I/O Pins — 24
Total Input Pins — 36 (12 dedicated + 24 I/O as inputs)
Global Clock Inputs — 2
Propagation Delay (LC grade) — [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data]
Propagation Delay (LC-30 grade) — 33 ns (per EP910LC44-30 verified data)
Process Technology — CMOS
Suhu Kerja — [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data]
Programming Method — EPROM (erasable UV for ceramic; OTP for plastic PLCC)
Architecture — AND-OR sum-of-products with programmable macrocell feedback
Logic Compatibility — TTL-compatible CMOS I/O
Status RoHS — [DATA_NEEDED: not stated in verified data]

Spek dan Sumber

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