EP910PC-15 vs EP910PC-35 Perbandingan

Perbandingan bersamaan detil EP910PC-15 dari Altera dan EP910PC-35 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910PC-15 EP910PC-35
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD Classic EPLD
Usable Gates 900 —
Macrocells 24 24
Maximum Pin-to-Pin Delay (tpd) 15 ns —
Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Supply Current (Icc) 80 mA typical —
Dedicated Inputs 10 12
Dedicated I/O Pins 12 —
Suhu Kerja 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Paket 24-pin PDIP (PDIP-24, 0.300 inch) 40-pin PDIP (Plastic DIP)
Tipe Mounting Through-Hole Through-Hole
Process Technology CMOS, UV-erasable —
Programming Method Altera Logic Programmer card UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools
Status RoHS [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] —
Level MSL Not applicable (through-hole) —
Device Type — EPLD (Erasable Programmable Logic Device)
I/O Pins — 24
Total Inputs — 36
Product Terms — 240
Propagation Delay (tPD) — 35 ns
Maximum Counter Frequency — 37 MHz
Internal Performance Frequency — 100 MHz
Technology — CMOS, UV-erasable/OTP
Tegangan Pemuat — 5 V
Architecture — PAL-type sum-of-products, AND/OR array
Compliance / RoHS — [DATA_NEEDED: RoHS status - legacy part]

Spek dan Sumber

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