EP910PC-20 vs EP910PC-25 Perbandingan
Perbandingan bersamaan detil EP910PC-20 dari Altera dan EP910PC-25 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP910PC-20 | EP910PC-25 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Device | EP910 | — |
| Usable Gates | 900 | 900 |
| Macrocell Count | [DATA_NEEDED: macrocell count] | — |
| Pin-to-Pin Delay (tPD) | 20 ns | 25 ns |
| Paket | PDIP-24 (PC suffix) | PDIP-24 (Plastic DIP) |
| Jumlah Pin | 24 | 24 |
| Supply Voltage (VCC) | 5 V | 5 V +/- 10% |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM |
| I/O Compatibility | 100% TTL | — |
| Suhu Kerja | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | EPROM programmer, JEDEC fuse map | — |
| Tipe Mounting | Through-Hole (DIP) | — |
| Level MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | — |
| Product Family | — | Classic EPLD |
| Integration Gates (typical) | — | 4800 |
| Macrocells | — | 24 |
| Maximum Operating Frequency (fMAX) | — | 33.3 MHz |
| Dedicated Inputs | — | 10 |
| Dedicated I/O Pins | — | 12 |
| TTL Compatibility | — | 100% TTL emulation |
| Erasure Method | — | Not erasable in plastic package (windowless) |