EPC16UI88 vs EPC16UC88N Perbandingan

Perbandingan bersamaan detil EPC16UI88 dari Altera dan EPC16UC88N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC16UI88 EPC16UC88N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Memory Density 16 Mb (2 MB) —
Configuration Interface Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG —
Core Supply Voltage 3.3 V —
Programming Interface IEEE 1149.1 JTAG (in-system programmable) JTAG (in-system) / Serial (in-system)
Maximum Configuration Clock 100 MHz —
Cascading Support Multi-device configuration chains —
Supported FPGA Families Altera Cyclone II/III/IV, Stratix II/III, APEX II —
Paket 88-ball UBGA (Ultra FineLine BGA), 11x8 mm —
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja -40C to +85C (industrial) 0 °C to +70 °C
Standby Current [DATA_NEEDED: standby current] —
Active Configuration Current [DATA_NEEDED: active configuration current] —
Programming Cycles [DATA_NEEDED: programming endurance cycles] —
Status RoHS Compliant —
Configuration Time [DATA_NEEDED: configuration time for typical 16 Mb bitstream] —
Ukuran Memori — 16 Mbit (16,777,216 bits)
Programmable Type — In System Programmable
Supply Voltage (Vcc) — 3.0 V to 3.6 V
Configuration Modes — Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG
On-Chip Decompression — Yes (Altera proprietary)
Paket / Case — 88-UBGA (11x8 mm) / 88-LFBGA
Jumlah Pin — 88
Bus-Hold on Data Lines — Yes
Standby Mode — Yes (reduced power consumption)
JTAG Boundary Scan — Yes (IEEE 1149.1)
On-Chip Oscillator — Yes (internal configuration clock)
Lead-Free / RoHS — Lead-Free (per datasheet)
Packaging — Tray

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