EPC16UI88 vs EPC16UC88N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC16UI88 sa pamamagitan ng Altera at EPC16UC88N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC16UI88 | EPC16UC88N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Memory Density | 16 Mb (2 MB) | — |
| Configuration Interface | Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG | — |
| Core Supply Voltage | 3.3 V | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (in-system) / Serial (in-system) |
| Maximum Configuration Clock | 100 MHz | — |
| Cascading Support | Multi-device configuration chains | — |
| Supported FPGA Families | Altera Cyclone II/III/IV, Stratix II/III, APEX II | — |
| Packhaging | 88-ball UBGA (Ultra FineLine BGA), 11x8 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 °C to +70 °C |
| Standby Current | [DATA_NEEDED: standby current] | — |
| Active Configuration Current | [DATA_NEEDED: active configuration current] | — |
| Programming Cycles | [DATA_NEEDED: programming endurance cycles] | — |
| Tindminan RoHS | Compliant | — |
| Configuration Time | [DATA_NEEDED: configuration time for typical 16 Mb bitstream] | — |
| Laki ng Memory | — | 16 Mbit (16,777,216 bits) |
| Programmable Type | — | In System Programmable |
| Supply Voltage (Vcc) | — | 3.0 V to 3.6 V |
| Configuration Modes | — | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG |
| On-Chip Decompression | — | Yes (Altera proprietary) |
| Packhaging / Kaso | — | 88-UBGA (11x8 mm) / 88-LFBGA |
| Bilang ng Pin | — | 88 |
| Bus-Hold on Data Lines | — | Yes |
| Standby Mode | — | Yes (reduced power consumption) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| On-Chip Oscillator | — | Yes (internal configuration clock) |
| Lead-Free / RoHS | — | Lead-Free (per datasheet) |
| Packaging | — | Tray |