EPC2C20 vs EPC2CC20N Perbandingan
Perbandingan bersamaan detil EPC2C20 dari Altera dan EPC2CC20N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC2C20 | EPC2CC20N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | NRND |
| Manufacturer | Altera | — |
| MPN | EPC2C20 | — |
| Device Type | Configuration device integrated circuit | — |
| Primary Function | Configuration of SRAM-based lookup-table devices | — |
| Configuration Architecture | Single-device configuration solution | — |
| Architecture Block 1 | Configuration controller | — |
| Architecture Block 2 | Flash memory | — |
| Memory Technology | Flash memory | — |
| Supported Device Class | SRAM-based LUT devices | — |
| Configuration Mode | [DATA_NEEDED: configuration mode] | — |
| Memory Density | [DATA_NEEDED: memory density] | — |
| Configuration Data Interface | [DATA_NEEDED: configuration data interface] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Configuration Clock Frequency | [DATA_NEEDED: configuration clock frequency] | — |
| Paket | [DATA_NEEDED: package] | PLCC-20 |
| Jumlah Pin | [DATA_NEEDED: pin count] | — |
| Rentang Suhu Kerja | [DATA_NEEDED: operating temperature range] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Fungsi | — | Configuration device for SRAM-based LUT FPGAs |
| Density | — | [DATA_NEEDED: bitstream density in bits] |
| Configuration Interface | — | 16-bit parallel (FPP) / Passive Serial (PS) |
| Supply Voltage (VCC) | — | 3.3 V |
| Programming Interface | — | JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster |
| In-System Programmable | — | Yes |
| Error Detection | — | 16-bit CRC on configuration frames |
| Configuration Modes Supported | — | FPP and PS (depends on host FPGA) |
| Cascadable | — | Yes (multiple EPC2 devices for larger bitstreams) |
| Open-Drain Status Pin | — | Yes (CONF_DONE / nSTATUS compatible) |
| Suhu Kerja | — | [DATA_NEEDED: industrial/commercial temp range] |
| Tipe Mounting | — | Surface Mount (PLCC-20 socket compatible) |
| Level MSL | — | [DATA_NEEDED: MSL rating] |