EPC2CC20N vs EPC2L120 Perbandingan

Perbandingan bersamaan detil EPC2CC20N dari Altera dan EPC2L120 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2CC20N EPC2L120
Merek Altera Altera
Kategori FPGA & CPLD Memory ICs
Status Lingkungan Hidup NRND NRND
Fungsi Configuration device for SRAM-based LUT FPGAs —
Density [DATA_NEEDED: bitstream density in bits] 120 Kbit
Paket PLCC-20 PLCC-20
Configuration Interface 16-bit parallel (FPP) / Passive Serial (PS) Serial, FPGA-targeted
Supply Voltage (VCC) 3.3 V —
Programming Interface JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster —
In-System Programmable Yes —
Error Detection 16-bit CRC on configuration frames —
Configuration Modes Supported FPP and PS (depends on host FPGA) —
Cascadable Yes (multiple EPC2 devices for larger bitstreams) —
Open-Drain Status Pin Yes (CONF_DONE / nSTATUS compatible) —
Suhu Kerja [DATA_NEEDED: industrial/commercial temp range] -40 C to +85 C
Tipe Mounting Surface Mount (PLCC-20 socket compatible) Surface Mount
Level MSL [DATA_NEEDED: MSL rating] —
Status RoHS [DATA_NEEDED: RoHS compliance status] unknown
Tipe Memori — Configuration PROM (Flash-based)
Operating Voltage — 2.7 V to 3.6 V (3.3 V typ)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Compatible FPGAs — Altera Cyclone, Cyclone II, APEX-series
CONF_DONE Output — Open-drain, wire-OR capable
Data Retention — 20 years (per Altera datasheet family)
Program/Erase Cycles — 100 cycles minimum
Lead-Free — unknown
Family — EPC2 (Enhanced Configuration)

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