EPC2CC20N vs EPC2L120 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2CC20N sa pamamagitan ng Altera at EPC2L120 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2CC20N EPC2L120
Brand Altera Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle NRND NRND
Fungsi Configuration device for SRAM-based LUT FPGAs —
Density [DATA_NEEDED: bitstream density in bits] 120 Kbit
Packhaging PLCC-20 PLCC-20
Configuration Interface 16-bit parallel (FPP) / Passive Serial (PS) Serial, FPGA-targeted
Supply Voltage (VCC) 3.3 V —
Programming Interface JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster —
In-System Programmable Yes —
Error Detection 16-bit CRC on configuration frames —
Configuration Modes Supported FPP and PS (depends on host FPGA) —
Cascadable Yes (multiple EPC2 devices for larger bitstreams) —
Open-Drain Status Pin Yes (CONF_DONE / nSTATUS compatible) —
Temperature na Operasyon [DATA_NEEDED: industrial/commercial temp range] -40 C to +85 C
Uri ng Pagpapasok Surface Mount (PLCC-20 socket compatible) Surface Mount
Level ng MSL [DATA_NEEDED: MSL rating] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] unknown
Uri ng Memory — Configuration PROM (Flash-based)
Operating Voltage — 2.7 V to 3.6 V (3.3 V typ)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Compatible FPGAs — Altera Cyclone, Cyclone II, APEX-series
CONF_DONE Output — Open-drain, wire-OR capable
Data Retention — 20 years (per Altera datasheet family)
Program/Erase Cycles — 100 cycles minimum
Lead-Free — unknown
Family — EPC2 (Enhanced Configuration)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita