EPC2LS20U vs EPC2L20U Perbandingan

Perbandingan bersamaan detil EPC2LS20U dari Altera dan EPC2L20U dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPC2L20U EPC2L20U - 1.6Mb Configuration PROM 20-PLCC | Altera

EPC2L20U - 1.6Mb Configuration PROM 20-PLCC | Altera

EPC2L20U ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPC2LS20U EPC2L20U
Merek Altera Altera
Kategori Memory ICs FPGA & CPLD
Status Lingkungan Hidup Obsolete Waktu Pembelian Terakhir
Product Type In-System Programmable Configuration PROM —
Memory Density 1.6 Mbit —
Operating Voltage (VCC) 3.3 V —
Antarmuka Altera serial configuration / JTAG —
Programming Method In-System Programmable (ISP) via JTAG —
Paket 20-PLCC (J-lead, 9x9 mm) 20-PLCC (PLCC-20)
Lead-Free / RoHS Yes (per "U" suffix) —
Suhu Kerja [DATA_NEEDED: Operating Temperature] -40C to +85C (industrial)
Supported FPGA Families Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000 —
Configuration Modes PS (Passive Serial), AS, FPP —
JTAG Support Yes (IEEE 1149.1 boundary scan) Yes (IEEE Std 1149.1 boundary scan)
Done Pin Yes (open-drain programmable polarity) —
nSTATUS Pin Yes (open-drain error flag) —
nCONFIG Pin Yes (reset/reconfiguration input) —
DCLK Output Yes (configuration clock to FPGA) —
Level MSL [DATA_NEEDED: MSL Level] [DATA_NEEDED: MSL level]
Compliance RoHS (Pb-free per U suffix) —
Ukuran Memori — 1.6 Mbit
Supply Voltage (VCC) — 3.0 V to 3.6 V
Tipe Antarmuka — Serial configuration (DCLK/DATA0)
Programmability — In-system programmable via IEEE 1532 / JTAG
Supported FPGAs — APEX II, APEX 20K, Mercury, Stratix, Cyclone, ACEX 1K
Configuration Mode — Single + Cascade (multi-PROM daisy chain)
Compression Support — Yes (FPGA decompresses bitstream)
Tipe Mounting — Surface Mount / Socket
Jumlah Pin — 20
Status RoHS — [DATA_NEEDED: RoHS status]
Lead-Free — [DATA_NEEDED: lead-free status]

Spek dan Sumber

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